SI5339C-C01-GMR

Clock/Timing - Clock Generators, PLLs, Frequency Synthesizers

The Silicon Labs SI5339C-C01-GMR is a versatile and high performance clock generator device with integrated PLLs and voltage-controlled oscillators for advanced clock requirements. It is ideal for a wide variety of application such as computing, communications and industrial. This device is especially suited to applications that require more flexibility than can be provided by conventional oscillator designs. Its advanced features and versatility provide customers with a much more efficient and cost-effective solution.

Applications

The SI5339C-C01-GMR device delivers high performance in a wide range of applications, including:

• Networking
• Embedded computing
• Telecom systems
• Industrial automation systems
• Medical instruments
• Wireless infrastructure
• Digital television
• Military and aerospace applications

Features

The SI5339C-C01-GMR offers excellent performance in terms of power consumption, output accuracy and total jitter. It also provides a wide range of features that help customers reach their clock performance goals. These features include:

• Integrated PLLs with low-noise voltage-controlled oscillators (VCOs)
• Broad frequency range of operation
• Low power consumption
• Low jitter and excellent phase noise performance
• Integrated noise cancellation
• Output skew and fan –out control
• Wide range of output formats and types

Working Principle

The SI5339C-C01-GMR device provides customers with a versatile PLL based frequency synthesis solution. It is designed to accept a reference clock and generate multiple output clocks from it. The device contains an integrated voltage-controlled oscillator (VCO) which can be used to generate output clocks at any frequency within the device’s specified range. By adjusting the control voltage (VCO control voltage), the frequency of the output clocks can be “tuned”. The device also contains an integrated phase-locked loop (PLL) circuit which allows the user to make precise adjustments to the frequency of the output clocks. The PLL is used to lock a locally generated reference clock to the reference clock input.

The SI5339C-C01-GMR device supports a variety of output formats, including, differential/ single-ended, LVPECL/LVDS/CML outputs, spread spectrum outputs, and pulse-width modulation outputs with programmable frequencies and duty cycles. In addition, the device supports a wide range of frequency tuning ranges and offers superior timing performance in terms of jitter, jitter transfer and periodetime stability, which makes it ideal for a wide range of applications.