| Allicdata Part #: | SL23EP09SI-1HT-ND |
| Manufacturer Part#: |
SL23EP09SI-1HT |
| Price: | $ 0.00 |
| Product Category: | Integrated Circuits (ICs) |
| Manufacturer: | Silicon Labs |
| Short Description: | IC BUFFER 220MHZ 9CH 3.3V 16SOIC |
| More Detail: | N/A |
| DataSheet: |  SL23EP09SI-1HT Datasheet/PDF |
| Quantity: | 1000 |
| 1 +: | 0.00000 |
Specifications
| Differential - Input:Output: | No/No |
| Base Part Number: | SL23EP09 |
| Supplier Device Package: | 16-SOIC |
| Package / Case: | 16-SOIC (0.154", 3.90mm Width) |
| Mounting Type: | Surface Mount |
| Operating Temperature: | -40°C ~ 85°C |
| Voltage - Supply: | 2.3 V ~ 3.6 V |
| Divider/Multiplier: | No/No |
| Frequency - Max: | 220MHz |
| Series: | -- |
| Ratio - Input:Output: | 1:9 |
| Number of Circuits: | 1 |
| Output: | LVCMOS |
| Input: | Clock |
| PLL: | Yes with Bypass |
| Part Status: | Obsolete |
| Packaging: | Tape & Reel (TR) |
Description
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SL23EP09SI-1HT is a clock generator manufactured by Silicon Laboratories, Inc. It is a low jitter and low noise PLL/VCO clock generator for communications applications. It is designed with a low-power, single-ended output driver, making it ideal for low-power applications such as routers, switches, and wireless base stations. The SL23EP09SI-1HT is designed to provide a high degree of system integration, low-jitter clock frequency synthesis, and low current consumption to minimize total system power.The SL23EP09SI-1HT generates any clock frequency from 156.25kHz to 900MHz, with frequency accuracy and jitter performance that exceeds all typical communications standards, including ITU-T (G.823), G.959.1, IEEE 1588-2008, and optical OIF-CEI 4.1. The SL23EP09SI-1HT features a high-efficiency voltage-controlled oscillator (VCO) that significantly reduces system power consumption, enabling designers to meet stringent power budgets in space-constrained applications. The SL23EP09SI-1HT is a three-pin clock generator, and the device’s output frequency is set through a composite control register comprised of three registers. The device also includes internal phase-locked loop (PLL) circuitry that generates a high-quality clock signal at its output. The device is designed to support multiple applications, such as E1/T1/J1, IEEE 1588-2008, SyncE, Ethernet, and OC-192. It is also compatible with the latest requirements set forth by the ITU-T G.823 telecom standard. The device supports Frequency Sigma Delta (FSD) modulation and a wide range of input frequencies that range from 4MHz to 156MHz. The SL23EP09SI-1HT\'s output is buffered by a low-power, single-ended output driver, making it ideal for low-power applications such as routers, switches, and wireless base stations. The SL23EP09SI-1HT is designed to provide a high degree of system integration, low-jitter clock frequency synthesis, and low current consumption to minimize total system power. The output driver is designed for a nominal output logic voltage of 3.3 V, but is fully compatible with lower supply voltages in the range of 1.8 V to 3.3 V. The SL23EP09SI-1HT uses a standard 27-bit register value to control its output frequency. The frequency is programmed through a 3-wire interface, consisting of a clock input (CK), a data input (DI), and a write enable (WE) input. By setting the 27-bit register value, a frequency resolution of 0.01% can be achieved. In addition, the device includes an internal control loop that enables the user to adjust several parameters, such as output frequency, skew, and spread spectrum, through the register values. In summary, the SL23EP09SI-1HT is an ideal clock generator for communications applications due to its low power consumption, wide range of input and output frequencies, low jitter performance, and high degree of system integration. For these reasons, the SL23EP09SI-1HT is an excellent choice for applications such as routers, switches, and wireless base stations.
The specific data is subject to PDF, and the above content is for reference
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