STM812TW16F

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1. Describe

The STM812TW16F microprocessor reset circuit is a low-power supervisory device for monitoring the power supply. They perform a single function: issue a reset signal whenever the VCC supply voltage falls below a preset value, and hold the signal active for a minimum time (trec) until VCC rises above a preset threshold. The STM811/812 also provides a push-button reset input (MR).

2. Feature

    1. Accurate monitoring of 3 V, 3.3 V and 5 V supply voltages

    2. Two output configurations

        – Push-pull RST output (STM809/811)

        – Push-pull RST output (STM810/812)

    3. 140 ms reset pulse width (min)

    4. Low Supply Current - 6 µA (typ)

    5. Guaranteed RST/RST assertion down to VCC = 1.0 V

    6. Operating temperature:

        –40 °C to 85 °C (industrial grade)

    7. Lead-free, small SOT23 and SOT143 packages

3. Reset output

STM812TW16F microprocessor reset circuit sends reset signal to MCU Whenever VCC falls below the reset threshold (VRST), or when the push-button reset input (MR) is pulled low. RST is guaranteed to be active at VCC = 1 V (0° to 70°C). During power-up, once VCC exceeds the reset threshold, an internal timer holds RST low for the reset timeout period trec. After this interval, RST returns high. If VCC is below the reset threshold, RST goes low. Each time RST is asserted, it is held low for at least the reset timeout period. The internal timer is cleared whenever VCC is below the reset threshold. The reset timer starts when VCC returns above the reset threshold. Active-low reset (RST) and active-high reset (RST) source and sink current.

4. Key reset input

A logic low on MR sets RST. RST remains active while MR is low and returns high for trec thereafter. The MR input has an internal 20 kΩ pull-up resistor, allowing it to be left open when not in use. This input can drive outputs with TTL/CMOS logic levels or open drain/collector. Connect a normally open pushbutton switch from MR to GND to create a manual reset function; no external debounce circuitry is required. If the device is used in a noisy environment, connect a 0.1 µF capacitor between MR and GND to improve noise immunity.

5. Negative VCC Transient

The STM812TW16F are relatively immune to negative-going VCC transients (glitches). The graph is generated using a negative pulse applied to VCC, starting at 0.5V above actual reset threshold and end at the specified amplitude (comparator overload). The maximum pulse width that a negative VCC transient can have without causing a reset pulse. As the transient amplitude increases (further below the threshold), the maximum allowable pulse width decreases. Any combination of duration below the curve and overload will not generate a reset signal. Typically, a VCC transient that is 100 mV below the reset threshold and lasts 20 µs or less will not generate a reset pulse. A 0.1 µF bypass capacitor mounted as close as possible to the VCC pin provides additional transient immunity.

6. product description