Allicdata Part #: | 72V835L15PF8-ND |
Manufacturer Part#: |
72V835L15PF8 |
Price: | $ 0.00 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | IDT, Integrated Device Technology Inc |
Short Description: | IC FIFO SYNC 2048X18 128QFP |
More Detail: | N/A |
DataSheet: | 72V835L15PF8 Datasheet/PDF |
Quantity: | 1000 |
1 +: | 0.00000 |
Bus Directional: | Bi-Directional |
Base Part Number: | 72V835 |
Supplier Device Package: | 128-TQFP (14x20) |
Package / Case: | 128-LQFP |
Mounting Type: | Surface Mount |
Operating Temperature: | 0°C ~ 70°C |
FWFT Support: | Yes |
Retransmit Capability: | No |
Programmable Flags Support: | Yes |
Expansion Type: | Depth, Width |
Series: | 72V |
Current - Supply (Max): | 60mA |
Voltage - Supply: | 3V ~ 3.6V |
Access Time: | 10ns |
Data Rate: | 66.7MHz |
Function: | Synchronous |
Memory Size: | 72K (2K x 18 x 2) |
Part Status: | Obsolete |
Packaging: | Tape & Reel (TR) |
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FIFOs (First In First Out) memories are used for storing and processing data in sequential order. The 72V835L15PF8 is a specific FIFO designed for use in high-speed systems. The chip can handle up to 15 parallel channels, each channel having its own independent data input, data output and flow control lines. The FIFO is based on a silicon-on-sapphire (SOS) gate array, providing higher-speed operation compared to other FIFO designs.
The 72V835L15PF8 offers a wide range of features and performance benefits. With its built-in Error Correction Code (ECC), it provides extra memory protection against data corruption. It also offers an on-chip 9-bit parallel strobe which increases the FIFO\'s throughput, and it has a programmable arbitration scheme which allows it to participate in several simultaneous transactions.
The 72V835L15PF8 is designed to be used in high-speed systems that require fast data transmission and storage. It is suitable for data acquisition channels, digital test instrumentation, digital video recorders, image processing systems, DMA interfaces, high-speed networks, and many other applications. It is also used in military aviation and defense systems.
The 72V835L15PF8 FIFO works by having data enter the FIFO on an input bus, which then queues the data in RAM memory. When a dequeue request is received, it is sent out on the output bus. The dequeue request can either be initiated by an external device or a timer. The timer allows for regular intervals for the data to be retrieved from the FIFO.
The FIFO has two main control registers which can be used to configure the depth of the FIFO and the size of each channel. Once configured, the FIFO can operate in either a single channel or multi-channel mode. In single channel mode, each channel can be independently operated and controlled. In multi-channel mode, the channels are linked together in a circular queue. The 72V835L15PF8 also has an internal pointer which keeps track of the position of data within the FIFO.
The chip also features a number of integrated systems to ensure data is handled properly. The first is the Status Register, which is used to monitor read and write operations, as well as status of the channels. Another is the Arbiter, which is a system used to arbitrate control of the channels between multiple devices. The last is the Flow Controller, which is used to monitor the flow of data and ensure proper synchronization between the devices.
The 72V835L15PF8 is a high-speed FIFO designed for use in high-speed systems. Its integrated features and performance benefits make it suitable for a wide range of applications. Its ECC provides extra protection against data corruption, and its on-chip 9-bit parallel strobe increases its throughput. The integrated systems also ensure that data is handled properly, and its configurability allows it to work in single- or multi-channel mode.
The specific data is subject to PDF, and the above content is for reference
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