Allicdata Part #: | 72V851L15PFI8-ND |
Manufacturer Part#: |
72V851L15PFI8 |
Price: | $ 0.00 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | IDT, Integrated Device Technology Inc |
Short Description: | IC FIFO SYNC 4096X18 15NS 64QFP |
More Detail: | N/A |
DataSheet: | 72V851L15PFI8 Datasheet/PDF |
Quantity: | 1000 |
1 +: | 0.00000 |
Bus Directional: | Bi-Directional |
Base Part Number: | 72V851 |
Supplier Device Package: | 64-TQFP (14x14) |
Package / Case: | 64-LQFP |
Mounting Type: | Surface Mount |
Operating Temperature: | -40°C ~ 85°C |
FWFT Support: | No |
Retransmit Capability: | No |
Programmable Flags Support: | Yes |
Expansion Type: | Depth, Width |
Series: | 72V |
Current - Supply (Max): | 40mA |
Voltage - Supply: | 3V ~ 3.6V |
Access Time: | 10ns |
Data Rate: | 66.7MHz |
Function: | Synchronous |
Memory Size: | 144K (8K x 9 x 2) |
Part Status: | Obsolete |
Packaging: | Tape & Reel (TR) |
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The 72V851L15PFI8 is a general purpose FIFO organized as 72 words-by-8 bits. The FIFO has a basic functionality of storing 72x8 bits of data and provides flags to indict empty or full conditions such that data can be read or written under proper control. The FIFO utilizes a dual-port RAM array that allows each port to read or write data independently at any address, providing concurrent access capability.
The 72V851L15PFI8 has a storage capacity of 72 words, each consisting of 8-bits of data. This data is stored in the FIFO memory array, which contains three independent RAM arrays of 72x8 bits, along with address and control logic. Data can be loaded into the FIFO memory through the write port. Data stored in the RAM can be read out of the FIFO memory through the read port. The FIFO utilizes a dual-port RAM architecture that allows both ports to read or write data independently at any address.
The 72V851L15PFI8 has three addressable registers: Empt Dely, FFull Dely, FFull and Empty. These registers allow the user to control the behavior of the FIFO regarding when to flag an empty or full condition. The Empt Dely register specifies the amount of empty entries that must be in the FIFO before an empty flag is generated, while the FFull Dely register specifies the amount of full entries that must be in the FIFO before a full flag is generated. The FFull and Empty registers indicate the current status of the FIFO: FFull indicates if the FIFO is full, while Empty indicates if the FIFO is empty.
The 72V851L15PFI8 is mainly used for memory access and communications applications. It is also used for buffer storage and sequencing of data messages. It can be used in many different applications such as communication networks, computer systems, embedded systems, and military applications. Additionally, the FIFO can be used in applications such as medical diagnosis and instrument data acquisition.
In conclusion, the 72V851L15PFI8 is a general purpose FIFO organized as 72 words-by-8 bits. It provides flags to indicate empty or full conditions, allowing data to be read or written in a controlled manner. The FIFO utilizes a dual-port RAM array to enable concurrent access. It is mainly used in memory access and communications applications, such as computer systems, embedded systems, and military applications, as well as medical diagnosis and instrument data acquisition.
The specific data is subject to PDF, and the above content is for reference
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