Bus Directional:	Bi-Directional
Base Part Number:	72V851
Supplier Device Package:	64-TQFP (14x14)
Package / Case:	64-LQFP
Mounting Type:	Surface Mount
Operating Temperature:	0°C ~ 70°C
FWFT Support:	No
Retransmit Capability:	No
Programmable Flags Support:	Yes
Expansion Type:	Depth, Width
Series:	72V
Current - Supply (Max):	40mA
Voltage - Supply:	3V ~ 3.6V
Access Time:	12ns
Data Rate:	50MHz
Function:	Synchronous
Memory Size:	144K (8K x 9 x 2)
Part Status:	Obsolete
Packaging:	Tape & Reel (TR)

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72V851L20PF8 Application Field and Working Principle

Overview

The 72V851L20PF8 is a logic FIFOs memory device specifically designed for increased speed, high density, and low power consumption. It is suitable for any application that requires a FIFO memory to store and manage data throughout its lifespan. As a FIFO device, it is composed of multiple stages for faster read and write operations.

Application Field

The 72V851L20PF8 is designed for applications such as communications, medical, industrial, and military. In these applications, data needs to be read and written to memory quickly and accurately. This device achieves this through its low power consumption, high speed, and high density. The 72V851L20PF8 has the capability to achieve data rates up to 100MHz and can store up to 512K bytes of data. The data stored will not be lost during power cyclings, meaning that the contents of the FIFO memory will remain intact even after a power cycle. This is due to the fact that the 72V851L20PF8 utilizes non-volatile memory to store the data. The device can also be used in heat shield applications, as well as black box applications. In addition, the 72V851L20PF8 is also suitable for other applications that involve the storing and moving of data quickly and accurately, such as data acquisition systems, automotive systems, and computer systems.

Design

The 72V851L20PF8 is composed of multiple stages to enhance its speed and performance. The first stage is a write stage, which is designed to quickly move data from the write port to the FIFO. The write stage consists of a write counter, a write address register, and a write port register.The second stage is a read stage, which is designed to equally quickly move data from the FIFO to the read port. The read stage consists of a read counter, a read address register, and a read port register. In addition, the read stage has additional circuitry that helps to ensure that the data is read accurately and quickly. The last stage is a memory stage, which is designed to enable the functioning of the write and read stages. The memory stage consists of a message buffer and a data buffer. The message buffer stores the write count, read count, and the number of words in FIFO. The data buffer stores the data written to and read from the FIFO.

Working Principle

The working principle of the 72V851L20PF8 begins with the write stage. As mentioned earlier, the write stage consists of a write counter, an write address register, and a write port register. The write counter counts the number of words written to the FIFO. The write address register is used for address comparison for write operations and the write port register temporarily stores the data that is being written to the FIFO.Once data is written to the FIFO, it then goes through the read stage. This stage consists of a read counter, a read address register, and a read port register. The read counter counts the number of words read from the FIFO. The read address register is used for address comparison for read operations, and the read port register temporarily stores the data that is being read from the FIFO.Lastly, data is sent to the memory stage. This stage consists of a message buffer and a data buffer, both of which serve to facilitate the operation of the write and read stages. The message buffer stores the write count, read count, and the number of words in the FIFO and the data buffer stores the data written to and read from the FIFO.

Conclusion

The 72V851L20PF8 is a logic FIFOs memory device that is designed for high speed, high density, and low power consumption. It is suitable for any application that requires a FIFO memory to store and manage data quickly and accurately. It is composed of multiple stages to facilitate faster read and write operations. Its non-volatile memory ensures that the contents of the FIFO memory remain intact even after power cycling. The device is suitable for applications such as communications, medical, industrial, and military as well as other data acquisition systems, automotive systems, and computer systems.

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