
Allicdata Part #: | 1727-2076-2-ND |
Manufacturer Part#: |
74LVC594ABQ,115 |
Price: | $ 0.23 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | Nexperia USA Inc. |
Short Description: | IC SHIFT REGISTER 8BIT 16HVQFN |
More Detail: | N/A |
DataSheet: | ![]() |
Quantity: | 9000 |
3000 +: | $ 0.21495 |
6000 +: | $ 0.20013 |
15000 +: | $ 0.19271 |
30000 +: | $ 0.18530 |
Series: | 74LVC |
Packaging: | Tape & Reel (TR) |
Part Status: | Active |
Logic Type: | Shift Register |
Output Type: | Push-Pull |
Number of Elements: | 1 |
Number of Bits per Element: | 8 |
Function: | Serial to Parallel, Serial |
Voltage - Supply: | 1.65 V ~ 3.6 V |
Operating Temperature: | -40°C ~ 125°C |
Mounting Type: | Surface Mount |
Package / Case: | 16-VFQFN Exposed Pad |
Supplier Device Package: | 16-DHVQFN (2.5x3.5) |
Base Part Number: | 74LVC594 |
Due to market price fluctuations, if you need to purchase or consult the price. You can contact us or emial to us: sales@allicdata.com
Logic - Shift Registers
>74LVC594ABQ is a 8-bit serial-in/serial or parallel-out shift register. This device contains an 8-bit shift register that feeds an 8-bit D-type storage register. All of the outputs from the storage register are simultaneousl y available from the outputs. The serial data-in pin receives data and feed it to the shift register, while the serial data-out output releases the data as the register shifts.
Application Field
74LVC594ABQ is used in application such as memory timing, multiplexers and analog switches, reducing the number of control signals place in a system at the cost of some additional logic and clock cycles. The device can be used to interface slow devices with faster devices. The shift register can also be used to serial-inrement functions in which data bits are changed sequentially by pushing the data bits through the shift register.
Working Principles
The toggle flip-flop used in the shift register portion of the device works as a single "one-bit" memory. Other advantages of the shift registers include the ability to daisy-chain shift registers together to expand the number of output signals that can be controlled by a single control signal. A single clock signal can control the timing of the shift registers so that data is loaded serially.
When the clock input is at a high the shift register is placed in the serial mode and the output data follows the input data on the waveform. When the clock is at low the shift register is disabled and the state of the internal system depends on the memory enable. If the memory enable is low then the flip-flop is reset and the data at the output latch is forced to zero. If the memory enable is high then the data in the flip-flop is passed through the latch to the output.
>The specific data is subject to PDF, and the above content is for reference
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