Allicdata Part #: | ADSP-21061KS-200-ND |
Manufacturer Part#: |
ADSP-21061KS-200 |
Price: | $ 0.00 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | Analog Devices Inc. |
Short Description: | IC DSP CONTROLLER 32BIT 240MQFP |
More Detail: | N/A |
DataSheet: | ADSP-21061KS-200 Datasheet/PDF |
Quantity: | 1000 |
1 +: | 0.00000 |
Series: | SHARC® |
Packaging: | Tray |
Part Status: | Obsolete |
Type: | Floating Point |
Interface: | Synchronous Serial Port (SSP) |
Clock Rate: | 50MHz |
Non-Volatile Memory: | External |
On-Chip RAM: | 128kB |
Voltage - I/O: | 5.00V |
Voltage - Core: | 5.00V |
Operating Temperature: | 0°C ~ 85°C (TC) |
Mounting Type: | Surface Mount |
Package / Case: | 240-BFQFP Exposed Pad |
Supplier Device Package: | 240-MQFP-EP (32x32) |
Base Part Number: | ADSP-21061 |
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Digital signal processors, or DSPs are an integral part of many embedded systems. The ADSP-21061KS-200 is a member of the ADSP-210XX family of high performance fixed-point digital signal processor (DSPs) designed specifically for embedded applications. Designed to expand the capability of low memory, low cost embedded applications, the ADSP-21061KS-200 is a versatile and capable processor.
The ADSP-21061KS-200 offers plentiful features, including an embedded 8-bit multiplier and 32-bit accumulator, and has four independent 16-bit multiply-accumulators. The processor also includes an optional on-board data cache, array/macro processor, and DMA controller. The DMA controller is especially helpful in reducing the load on the core when servicing frequent memory transfers of large amounts of data.
The ADSP-21061KS-200 is also outfitted with up to eight individually configurable peripheral interfaces, which are further expandable through the addition of external peripherals. This maximizes the flexibility of the system and offers the opportunity to deploy the ADSP-21061KS-200 in a wide range of applications that demand complex signal processing.
In terms of memory integration, the ADSP-21061KS-200 can be configured with between 4 and 8 kilobytes of instruction and 4 and 8 kilobytes of data memory. It has a memory space of 32 bits and 8 address lines, and supports Data/Instruction cache and burst program/data bus cycles. This provides high performance signal processing operations. The ADSP-21061KS-200 offers a full 32-bit address/data bridge for linking memory, FIFOs, and external memories.
The ADSP-21061KS-200 is capable of operating at speeds up to 50MHz and it is based on a 5 stage pipeline architecture. The processor core is the Harvard architecture, this architecture allows the possibility of simultaneous programming and data operations with separate buses for program and data. It has an instruction set featuring single- and two-word instructions, allowing effective implementation of complex and powerful algorithms.
The ADSP-21061KS-200 can be used in a wide array of application fields, such as communications systems, imaging and video, audio and multimedia, embedded controllers, automation systems, and industrial electronics. This range of applications is enabled and served primarily by the very versatile and highly configurable instruction sets provided by the ADSP-21061KS-200, combined with it\'s generous RAM and ROM capabilities. High performance system level memory and data crunching tasks can be easily achieved with the DMA controller, enabling applications such as wireless networking and data acquisition.
The ADSP-21061KS-200 is an excellent embedded DSP due to its configurability, versatile design, robust instruction sets, generous RAM and ROM capabilities, and its high speeds. It offers powerful processing and memory capabilities, ranging from audio and video, communications systems, controllers and automation systems, industrial electronics, and embedded applications, and is able to perform most system level data crunching tasks.
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ADSP-H3L3 | Broadcom Lim... | 0.0 $ | 1000 | 7SEG DISPLAY 1DIGIT ORN 0... |
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