DS1L5DJ130K-C Allicdata Electronics
Allicdata Part #:

408-1126-ND

Manufacturer Part#:

DS1L5DJ130K-C

Price: $ 0.00
Product Category:

Inductors, Coils, Chokes

Manufacturer: Susumu
Short Description: IND DELAY LINE 1.3NS 1 OHM TH
More Detail: 1.3ns ±0.050nS Inductor Delay Line 100mA 50 Ohms 3...
DataSheet: DS1L5DJ130K-C datasheetDS1L5DJ130K-C Datasheet/PDF
Quantity: 1000
1 +: 0.00000
Stock 1000Can Ship Immediately
$ 0
Specifications
Series: DS1L
Packaging: Bulk 
Part Status: Obsolete
Delay Time: 1.3ns
Tolerance: ±0.050nS
Operating Temperature: -10°C ~ 85°C
Mounting Type: Through Hole
Package / Case: 3-SIP
Impedance: 50 Ohms
DC Resistance (DCR): 1 Ohm Max
Current: 100mA
Description

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Delay Lines are devices used in various fields to both store and delay digital information. Delay Lines can be used for data storage, memory enhancement, or signal timing. They are a key component in many data systems, as delays are a fundamental concept in many computer-based applications. An example of this type of device is the DS1L5DJ130K-C. The DS1L5DJ130K-C is an ultra-low-power cMOS quad digital delay line.

Application Field of DS1L5DJ130K-C

The DS1L5DJ130K-C is suitable for applications used in medical, military, avionics, industrial, communications, and automotive markets. Its design allows for reliable operation over temperatures up to 125°C due to the integrated heat sink which removes excess heat. The low supply current helps conserve battery power in mobile wireless applications. The output of the DS1L5DJ130K-C is equipped with an optional bias setting, allowing the output signal to be shifted to a more suitable voltage range for logic and analog circuits, and can be used to reduce system noise. The inputs are also designed to be able to accommodate input levels of up to 5V to ensure compatibility with many applications.

Working Principle of DS1L5DJ130K-C

The DS1L5DJ130K-C is powered by a 5V supply. A single clock input can be used to set the delay in discrete steps, while the enable signal is used to set the operating mode. The output of the device can be set to either “high” or “low” based on the position of the enable signal. The device can be programmed to produce a predefined delay with clock cycles greater or less than the value of the clock period. A single delay is set using the value of the delay time. If multiple delays are required, they can be set using multiple clock cycles and values. The device will then run until all of the delays have been implemented, and will then output a single signal.

The DS1L5DJ130K-C is designed to provide higher speed, reliability, and low power consumption than other digital delay lines. It also provides an integrated heat sink to ensure reliable operation in higher temperature operations. The device is equipped with an optional bias setting which can be used to reduce noise levels in the system. With its high speed and low power consumption, the DS1L5DJ130K-C provides a viable solution for many applications.

The specific data is subject to PDF, and the above content is for reference

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