NLX2G16BMX1TCG

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With the rapid development of digital products, optical signal transmission technology has been widely used in the fields of communication, industrial control and other types of digital signal transmission. In the transmission line of optical signals, it is inevitable that there will be attenuation, crosstalk and other phenomena, so it is necessary to set up line drivers. NLX2G16BMX1TCG is a line driver released by ON Semiconductor. This article will introduce its application field and working principle.

1.Field of application

NLX2G16BMX1TCG is a line driver for transmitting optical and electrical signals, which can be used in multiple markets, including computing, communication, industrial control and automotive, etc. With its internal Pease-Cullen Flip-Flop and integrated gate logic, NLX2G16BMX1TCG is suitable for the transmission of high speed signals, fiber-optic baseband transmission and other high-speed applications.

2.Working principle

The NLX2G16BMX1TCG is composed of two stages, the memory stage and the logic stage, as shown in Figure 1. The memory stage contains 18 Pease-Cullen flip-flops as a latch, the state of which is determined by the input signals PSEN and R/W. The output signals of the memory stage will drive the gate logic to form logic functions.

Figure 1. Working principle of the NLX2G16BMX1TCG

The Pease-Cullen flip-flops in the memory stage can store input signals when it receives the PSEN and R/W signals. The R/W signal is an active low level that can reset the flip-flops and output "111" when pulsed, while the active high PSEN signal can set the flip-flops to the opposite state. After the memory stage registers the data, the data signals are passed to the gate logic.

The data signals in the memory stage will enter the gate logic. The gate logic has three inputs: synchronous reset SR, chip select CS and clock CLK. SR is an active low signal, resetting the flip-flops when it is pulsed. When CS is an active low level and SR is an inactive level or is disabled, the clock signal CLK will enter the gate logic and the gate logic will then be able to control the output of the line driver. The gate logic can control the turning on and off of the output signals and thus control the output states of the line driver.

The output signals of the gate logic are then input to the output buffer of NLX2G16BMX1TCG to provide the final output. The output buffer is composed of an inverter and a push-pull output buffer. The inverter output is cleared to a low level when it receives an active low CS signal, and the push-pull output buffer then provides the bipolar output, turning off the output when it receives an active low SR signal.

3.Conclusion

NLX2G16BMX1TCG is a line driver widely used in multiple markets. This line driver consists of a memory stage and a gate logic stage and an output buffer, which can provide a reliable transmission of optical and electrical signals with the combination of its internal Pease-Cullen Flip-Flop and integrated gate logic.

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