PI6C490097LE Allicdata Electronics
Allicdata Part #:

PI6C490097LE-ND

Manufacturer Part#:

PI6C490097LE

Price: $ 0.00
Product Category:

Integrated Circuits (ICs)

Manufacturer: Diodes Incorporated
Short Description: IC CLOCK GENERATOR 16TSSOP
More Detail: N/A
DataSheet: PI6C490097LE datasheetPI6C490097LE Datasheet/PDF
Quantity: 1000
Stock 1000Can Ship Immediately
Specifications
Differential - Input:Output: No/No
Base Part Number: PI6C490097
Supplier Device Package: 16-TSSOP
Package / Case: 16-TSSOP (0.173", 4.40mm Width)
Mounting Type: Surface Mount
Operating Temperature: 0°C ~ 70°C
Voltage - Supply: 3.135 V ~ 3.465 V
Divider/Multiplier: No/No
Frequency - Max: 25MHz
Series: --
Ratio - Input:Output: 1:4
Number of Circuits: 1
Output: LVCMOS
Input: LVCMOS, Crystal
PLL: Yes with Bypass
Part Status: Last Time Buy
Packaging: Tube 
Description

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Clock/Timing – Clock Generators, PLLs, Frequency Synthesizers

The PI6C490097LE is a low-power, single-input, differential output, clock generator or phase-locked loop (PLL) used in a wide range of applications. Understanding the application field and working principle of the PI6C490097LE can help engineers achieve optimal performance and power efficiency in their designs.

Application Field

The PI6C490097LE is designed for use as a single-input, differential output, clock generator or phase-locked loop (PLL). This multifunctional manufactue product is suitable for a range of applications including networking, telecommunications, computing, and industrial. For networking, the PI6C490097LE family can be used to generate reference clocks for 802.11ac, Bluetooth 5.1, DOCSIS 3.1, and 10G Ethernet. In the telecommunications space, the PI6C490097LE can be employed for PON, FTTA, and SONET/SDH applications. For computing, the PI6C490097LE can be used to generate reference clocks for PCI Express, Memory Bus, and SATA. Finally, in industrial use cases, the PI6C490097LE can be used to generate clock signals in Automotive Ethernet, automation and robotic systems, and servo drives.

Working Principle

The PI6C490097LE employs a wide range of technologies to deliver the optimal performance in the most power efficient way. It includes a low-jitter PLL loop, low-noise voltage controlled oscillator (VCO), high-impedance drive stages, advanced signal routing and inductive peaking to ensure minimal power consumption. When the input signal is applied, the chip’s PLL loop uses the input signal to configure the VCO frequency, the PLL bandwidth and output duty cycle. The input signal is then amplified, filtered and routed to the buffered output stages and supplied to the differential outputs.The PI6C490097LE utilizes a dual-loop architecture, which eliminates the need for manual calibration and reduces the input signal jitter. By monitoring the gain parameters of each loop and then measuring the phase shift across them, the chip automatically adjusts the loop parameters to achieve optimal performance.

Conclusion

The PI6C490097LE is a low-power, single-input, differential output, clock generator or phase-locked loop (PLL) used in a wide range of applications. It includes a low-jitter PLL loop, low-noise voltage controlled oscillator (VCO), high-impedance drive stages, advanced signal routing and inductive peaking to ensure minimal power consumption, and to provide optimal performance.By providing fast jitter and frequency lock times, automatic calibration, and advanced integration, the PI6C490097LE is suitable for many applications including, networking, telecommunications, computing, industrial, and automotive systems.

The specific data is subject to PDF, and the above content is for reference

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