Allicdata Part #: | SY10E160JC-TR-ND |
Manufacturer Part#: |
SY10E160JC-TR |
Price: | $ 3.02 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | Microchip Technology |
Short Description: | IC 12-BIT GEN/CHKER 28PLCC |
More Detail: | Parity Generator 12-Bit 28-PLCC (11.5x11.5) |
DataSheet: | SY10E160JC-TR Datasheet/PDF |
Quantity: | 1000 |
750 +: | $ 2.74667 |
Series: | 10E |
Packaging: | Tape & Reel (TR) |
Part Status: | Discontinued at Digi-Key |
Logic Type: | Parity Generator/Checker |
Number of Circuits: | 12-Bit |
Current - Output High, Low: | -- |
Voltage - Supply: | 4.2V ~ 5.5V |
Operating Temperature: | 0°C ~ 85°C |
Mounting Type: | Surface Mount |
Package / Case: | 28-LCC (J-Lead) |
Supplier Device Package: | 28-PLCC (11.5x11.5) |
Base Part Number: | 10E160 |
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Organic logic circuits are typically used in the development of logic circuits that are meant to be used in the applications of parity generators and checkers. One of the most common ICs used in this application is the SY10E160JC-TR, which is a quad parity generator/checker. This IC is specifically designed to generate and/or monitor two-dimensional parity codes while providing an output signal that can be used to indicate different conditions.
The SY10E160JC-TR has four operating modes, which are determined by the state of the mode select pins 1, 2 and 3. When pin 1 is in the logic low state, pin 2 is in the high state and pin 3 is in the low state, then the IC enters the parity checker mode. The other three modes are parity generator mode, quasibus mode and data path inverter (DPI) mode.
The parity checker mode of the IC checks the binary data entering the device and then compares it to the parity reference data that is stored in the internal counter. If the comparison is found to show an inconsistency between the two sets of data, then the output pin X3 will be driven low. This can then be used as an indication of an operational error in the system.
The parity generator mode of the IC generates two-dimensional parity codes which can be used to check the data that is being sent. When enabled, the device generates the parity reference data, which is then compared to the data that is being inputted. If the data is found to not be in sync with the parity reference data, then the output pin X3 is driven low.
The quasibus mode operates as a synchronous bus with combinational control logic to control bus operations. This mode allows for the data stored in registers within the device to be transferred, compared and stored.
The last mode is the data path inverter (DPI) mode, which functions as a combinational logic inverter. This mode is used to perform computational operations with the data that is stored in the internal registers and then output an appropriate signal based on the parity result.
The SY10E160JC-TR is a powerful IC that is especially suited for applications of parity generators and checkers. Its four different operating modes make it versatile and easy to use in a variety of electronic designs. This IC is a powerful tool for designers working on parity-based applications and is sure to be a great asset in any engineer’s arsenal.
The specific data is subject to PDF, and the above content is for reference
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