UCC5320SCD

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1. Description

The UCC5320SCD is a family of single-channel, isolated gate drivers designed to drive MOSFETs, IGBTs, SiC MOSFETs, and GaN FETs (UCC5350SBD). The UCC53x0S provides a split output that controls the rise and fall times individually. The UCC53x0M connects the gate of the transistor to an internal clamp to prevent false turnon caused by Miller current. The UCC53x0E has its UVLO2 referenced to GND2 to get a true UVLO reading. The UCC53x0 is available in a 4 mm SOIC-8 (D) or 8.5 mm SOIC-8 (DWV) package and can support isolation voltage up to 3 kVRMS and 5 kVRMS respectively. With these various options the UCC53x0 family is a good fit for motor drives and industrial power supplies. Compared to an optocoupler, the UCC53x0 family has lower part-to-part skew, lower propagation delay, higher operating temperature, and higher CMTI.

2. Features

    1. Feature Options

        – Split Outputs (UCC53x0S)

        – UVLO Referenced to GND2 (UCC53x0E)

        – Miller Clamp Option (UCC53x0M)

    2. 8-pin D (4-mm Creepage) and DWV (8.5mm Creepage) Package

    3. 60-ns (Typical) Propagation Delay

    4. 100-kV/μs Minimum CMTI

    5. Isolation Barrier Life > 40 Years

    6. 3-V to 15-V Input Supply Voltage

    7. Up to 33-V Driver Supply Voltage

        – 8-V and 12-V UVLO Options

    8. Negative 5-V Handling Capability on Input Pins

    9. Safety-Related Certifications:

        – 7000-VPK Isolation DWV (Planned) and 4242- VPK Isolation D per DIN V VDE V 0884-11:2017-01 and DIN EN 61010-1

        – 5000-VRMS DWV and 3000-VRMS D Isolation Rating for 1 minute per UL 1577

        – CQC Certification per GB4943.1-2011 D and DWV (Planned)

  10. CMOS Inputs

  11. Operating Temperature: –40°C to +125°C

3. Applications

    1. Motor Drives

    2. High Voltage DC-to-DC Converters

    3. UPS and PSU

    4. HEV and EV Power Modules

    5. Solar Inverters

4. Pin Configuration

5. Pin Function

6. Function description

1. power supply

VCC1 input power supports a wide voltage range from 3 V to 15 V, and VCC2 output power supports Supports a voltage range of 9.5 V to 33 V. For bipolar power operation, the power supply is off The gate has a negative voltage relative to the emitter or the source. This configuration can prevent power The device turns on unexpectedly due to the current induced by the Miller effect. Typical value of The output power of VCC2 and VEE2 for bipolar operation is 15 V and –8 V, relative to GND2 and 20 V of IGBT And –5 V is used for SiC MOSFET. For operation with a unipolar power supply, the VCC2 power supply is connected to 15 V, relative to the VEE2 of the IGBT, and 20 V is used for SiC MOSFET. The VEE2 power supply is connected to 0 V. In this use case, the UCC53x0 device with Miller You can use the clamp function (UCC53x0M). The Miller clamp function is achieved by adding a low The impedance path between the gate of the power device and the VEE2 power supply. Miller current passes The clamp pin clamps the gate voltage to below the gate's turn-on threshold.

2. Input stage

The input pins (IN+ and IN–) of the UCC53x0 series are based on CMOS compatible input threshold logic, which is completely isolated from the VCC2 power supply voltage. The input pins are easy to drive with logic level control signals because the UCC53x0 series has a typical high threshold (VIT+(IN)) Typical low thresholds of 0.55 × VCC1 and 0.45 × VCC1. The wide hysteresis (Vhys(IN)) of 0.1 × VCC1 has strong noise immunity and stable operation. If any input remains open, the 128 kΩ internal pull-down resistor forces the IN+ pin to be low, and the 128 kΩ internal resistor pulls IN– high. However, TI still recommends grounding an input or connecting to VCC1 if it is not used to improve noise immunity. Since the input side of the UCC53x0 series is isolated from the output driver, the input signal amplitude can be greater or less than VCC2, provided that it does not exceed the recommended limit. This feature allows greater flexibility when integrating the gate driver with the control signal source, and allows the user to select the most effective VCC2 for any gate. However, the amplitude of any signal applied to IN+ or IN– must never be at a voltage higher than VCC1.

3. Output stage

The output stage of the UCC53x0 series adopts a pull-up structure, which can provide the highest peak source current When it is most needed, that is, during the Miller platform area where the power switch is switched on (when The drain or collector voltage of the power switch experiences dV/dt). The output stage pull-up structure has a parallel P-channel MOSFET and an additional pull-up N-channel MOSFET. The role of N channels The MOSFET will provide a short increase in the peak source current to achieve fast turn-on. Fast turn-on is to turn on the N-channel MOSFET briefly within a narrow moment when the output changes to achieve the state from low to high. The ROH parameter is a DC measurement value, which represents the on-resistance of the P-channel device. This parameter only applies to P-channel devices, because the pull-up N-channel device remains in the OFFDC state and only turns on for a short time when the output changes from a low state to a high state. Therefore, in this short turn-on phase, the effective resistance of the UCC53x0 pull-up stage is much lower than what the ROH parameter represents, and it will produce a faster turn-on. The on-phase output resistance is a parallel combination ROH || State Oceanic Administration. The pull-down structure in UCC53x0 S and E versions consists of only N-channel MOSFETs. For the M version, when the CLAMP and OUT pins are connected to the pull-up and pull-down structure, an additional FET is connected in parallel to the gate of the IGBT or MOSFET. The output voltage swing between VCC2 and VEE2 provides rail-to-rail operation.