DS90LV028ATLDX/NOPB

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DS90LV028ATLDX/NOPB Application Field and Working Principle

DS90LV028ATLDX/NOPB is a low-voltage differential signal (LVDS) transceiver used for high-speed serial data communications. It is a bidirectional transceiver that provides differential line rates up to 800 Mbps. The LVDS receiver and transmitter implementing an 8-bit to 10-bit wide digital data port. The transceiver can also be configured with a split-mode data port width, allowing support for a 16-bit data port width.

Application Field

The DS90LV028ATLDX/NOPB is ideal for applications that need to transmit and/or receive data at high speed over a short distance, such as high-definition video applications, backplane communications, and industrial process control. The transceiver offers a power-saving sleep mode and is compatible with a wide range of products like FPGAs, PLDs, and microcontrollers.

Working Principle

The DS90LV028ATLDX/NOPB is a low-voltage differential signal transmitting and receiving device used for high-speed serial data communications. LVDS transceivers are commonly used in optical fiber or copper cable connections, where the precise timing of data transfers is critical. The transceiver’s low-voltage differential signals (LVDS) enable long-distance transmission of data at much higher data rates than other interface signals.

The transmitter side of the LVDS transceiver sends out data encoded as either 8-bit or 10-bit wide digital signals into two-lane LVDS differential pairs. The receiver side has two differential input tracks to detect the received data. A voltage swing of 350 mV peak to peak is required for the communications over the LVDS lines. The transceiver is able to operate at data rates up to 800 Mbps with an output impedance of 50 Ω on each LVDS lane.

The transceiver implement an 8-bit wide data port and control switches in the transmitter and receiver block. An added feature, called split-mode, allows the receiver and transmitter to have different data port widths. The transceiver can also be configured to provide higher data transfer rates when multiple LVDS lanes are used. This transceiver can either be operated in a standalone, or with a communication interface like Serial Peripheral Interface (SPI). The transceiver is designed with an on-chip sleep mode which automatically reduces the power consumption when the serial data is not being transmitted.

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