72281L20PFI

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FIFOs or First-In First-Out buffers are one of the most basic memory elements found in digital systems used to store and prioritize data. The 72281L20PFI FIFO is a semiconductor memory device produced by Silicon Storage Technology, Inc. Specifically, the 72281L20PFI is a two-port, byte-oriented, dual-ported associative memory. This device serves as a First-In-First-Out data queue, allowing two independent ports to access memory elements. Each has the ability to both read from and write to the same memory at variable speeds in a synchronized manner. By utilizing a “first-in, first-out” scheme for data flow, the 72281L20PFI can effectively handle data traffic between two ports or systems with drastic speed differences.

The 72281L20PFI is intended specifically for VMEbus-based systems. As such, it is particularly suitable as an interface between VMEbus subsystems and I/O devices. Due to its ability to buffer data, the device is also ideal for storing and transferring information between systems. Additionally, the semiconductor device is fitted with programmable features applicable in queuing regularly-recurring bus cycles and arbitration. This allows multiple controllers to access the same memory in a predictable order.

The device is programmed in much the same way as regular non-volatile Flash memory. This is accomplished by sending control data to the 72281L20PFI’s instruction decode logic where it is processed and executed. This intuitive design allows for simplified programming from an external host CPU. In addition to programming, the logic can also be configured for three distinct operating modes allowing for various uses.

The three primary modes of operation the 72281L20PFI include Interrupt Mode, Single Transaction Mode and Transaction Mode. In Interrupt Mode, the FIFO will send an interrupt signal to the host CPU whenever certain predetermined conditions are met. This allows the external CPU to be notified of any changes to the state of the memory in time to take appropriate action. The Single Transaction Mode is used to transfer data between two ports as quickly as possible. This mode uses high-speed pointer increments, transfers, and data exchanges to transfer the data quickly and efficiently. Finally, the Transaction Mode is used in situations where frequent transferring between ports is required. This is accomplished by executing long multi-block transfers of thousands of bytes at a time while minimizing the number of transactions.

The 72281L20PFI’s logic is also programmable to adjust for various environmental factors. This allows the FIFO to more easily match the speed of two systems communicating with one another. As such, the 72281L20PFI can be adjusted for transfer speeds as fast as 80Mbps and as low as 9.6Kbps.

COBOL and assembly language operations can be programmed for use together in the 72281L20PFI, allowing for direct access to the contents of a FIFO without having to use a micro-programmed unit. Furthermore, the memory can be segmented into separate locations as needed, reducing the size of the memory while still maintaining strict organization.

As an associative memory device, the 72281L20PFI is ideal for most data traffic control applications in VMEbus-based systems. By making volatile memory programmable and transparent, the device allows for powerful application of FIFO designs. With multiple modes of operation, adjustable speed operations, and programming for COBOL and assembly language, the 72281L20PFI is a versatile and useful addition to any digital system.

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