Allicdata Part #: | 74FCT2373CTQG-ND |
Manufacturer Part#: |
74FCT2373CTQG |
Price: | $ 0.25 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | IDT, Integrated Device Technology Inc |
Short Description: | IC TRANSP LATCH OCTAL 20-QSOP |
More Detail: | D-Type Transparent Latch 1 Channel 8:8 IC Tri-Stat... |
DataSheet: | 74FCT2373CTQG Datasheet/PDF |
Quantity: | 1000 |
1155 +: | $ 0.22176 |
Series: | 74FCT |
Packaging: | Tube |
Part Status: | Active |
Logic Type: | D-Type Transparent Latch |
Circuit: | 8:8 |
Output Type: | Tri-State |
Voltage - Supply: | 4.75 V ~ 5.25 V |
Independent Circuits: | 1 |
Delay Time - Propagation: | 2ns |
Current - Output High, Low: | 15mA, 12mA |
Operating Temperature: | -40°C ~ 85°C |
Mounting Type: | Surface Mount |
Package / Case: | 20-SSOP (0.154", 3.90mm Width) |
Supplier Device Package: | 20-QSOP |
Base Part Number: | 74FCT2373 |
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The 74FCT2373CTQG is a 3.3V CMOS latch suitable for use in low-voltage applications. It has two flip-flops that are controlled by two separate control signals. Each flip-flop independently stores a binary state, allowing for independent control of two separate signals. The 74FCT2373CTQG contains two positive-edge triggered D-type flip-flops with individual data and output delays. The flip-flop inputs and outputs are configured as complementary buffers, providing low-impedance outputs for increased system speed.
The logic level on each data input is sampled on the rising clock edge and transferred to the corresponding Q output. The data inputs are preset by means of an enabling signal. Both the preset and clear functions are asynchronous. The outputs of the two flip-flops remain unchanged during power-down/power-on reset, while the input is still active.
The working principle of the 74FCT2373CTQG is based on clocking in data and propagating it through the two latches. When the clock signal is asserted, the data input will be clocked into the latch and the corresponding output will be updated accordingly. The data input will be referred to as “D” and the output will be referred to as “Q”. When the clock signal is negated, the data input is ignored and the state of the output remains unaffected. The output can be preset and cleared independently of the clock input through the use of the preset and clear inputs.
The 74FCT2373CTQG is suitable for a wide range of applications, including bus buffers and bus latches, flip-flop registers, analog-to-digital converters, circuit board addressing, memory address latches, destructive readout systems, and general-purpose flip-flops. It is also ideal for use in low-power devices as it is rated at very low standby current levels.
In conclusion, the 74FCT2373CTQG is a 3.3V CMOS latch designed for low-voltage applications. It has two flip-flops which are controlled by two separate control signals. The logic level on each data input is sampled on the rising clock edge and transferred to the corresponding Q output. The data inputs can also be preset or cleared independently of the clock signal. The 74FCT2373CTQG is suitable for a wide range of applications, particularly in low-power devices as it is rated at very low standby current levels.
The specific data is subject to PDF, and the above content is for reference
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