
Allicdata Part #: | 74LVT373SJ-ND |
Manufacturer Part#: |
74LVT373SJ |
Price: | $ 0.00 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | ON Semiconductor |
Short Description: | IC LATCH TRANSP OCT 3ST 20SOP |
More Detail: | D-Type Transparent Latch 1 Channel 8:8 IC Tri-Stat... |
DataSheet: | ![]() |
Quantity: | 1000 |
1 +: | 0.00000 |
Series: | 74LVT |
Packaging: | Tube |
Part Status: | Obsolete |
Logic Type: | D-Type Transparent Latch |
Circuit: | 8:8 |
Output Type: | Tri-State |
Voltage - Supply: | 2.7 V ~ 3.6 V |
Independent Circuits: | 1 |
Delay Time - Propagation: | 1.5ns |
Current - Output High, Low: | 32mA, 64mA |
Operating Temperature: | -40°C ~ 85°C |
Mounting Type: | Surface Mount |
Package / Case: | 20-SOIC (0.209", 5.30mm Width) |
Supplier Device Package: | 20-SOP |
Base Part Number: | 74LVT373 |
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The 74LVT373SJ is a 3-state octal D-type transparent latch with non-inverted outputs from high speed TTL. It is typically used in buses or other applications requiring high speed data exchange between multiple independent logic elements. This article will discuss the application field and working principle of the 74LVT373SJ.
Application Field
The 74LVT373SJ is primarily used in buses or other applications requiring high speed data exchange between multiple independent logic elements. These applications may include system level integration, data and clock synchronization, data stacking etc. As this latch is synchronous and has very low fan-out capability, it can effectively reduce system level logic contention and make data transfer more efficient. The device can also be used in memory systems and computer systems where it can enable the high speed transfer of large amounts of data from one location to another. Additionally, the latch can be used in applications such as multiplexers, digital control systems and interface adaptors.
Working Principle
The 74LVT373SJ latch consists of eight non-inverted output latches, each of which has three state capability. It operates on a standard logic supply voltage range of 4.5V to 5.5V. The latch has three logic inputs (A, B, C) and two enable inputs (E1, E2). When either of its enable inputs is asserted at logic high, the data present at the A and B inputs are latched to the output of the latch. It is also possible to enable the latch with the B input alone by placing the E2 input at logic low.
The three-state output of the 74LVT373SJ is controlled by the C input. When this input is held at logic low, the output state is determined by the inputs A and B. When the C input is at logic high, an internal transistor inside the chip is activated which turns off the output of the latch. This effectively puts the output of the latch in a high impedance state.
Conclusion
The 74LVT373SJ latch is a high speed TTL three-state octal D-type transparent latch with non-inverted outputs. It is used in many applications requiring high speed data exchange between multiple independent logic elements. The latch has three logic inputs and two enable inputs, and the output can be put into a high impedance state by controlling the C input.
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