Allicdata Part #: | 854110AKILFT-ND |
Manufacturer Part#: |
854110AKILFT |
Price: | $ 5.28 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | IDT, Integrated Device Technology Inc |
Short Description: | IC CLK BUF 2:10 16MHZ 32VFQFPN |
More Detail: | Clock Fanout Buffer (Distribution), Multiplexer IC... |
DataSheet: | 854110AKILFT Datasheet/PDF |
Quantity: | 1000 |
2500 +: | $ 4.79808 |
Specifications
Series: | -- |
Packaging: | Tape & Reel (TR) |
Part Status: | Active |
Type: | Fanout Buffer (Distribution), Multiplexer |
Number of Circuits: | 1 |
Ratio - Input:Output: | 2:10 |
Differential - Input:Output: | Yes/Yes |
Input: | LVDS, LVPECL |
Output: | LVDS |
Frequency - Max: | 16MHz |
Voltage - Supply: | 2.375 V ~ 2.625 V |
Operating Temperature: | -40°C ~ 85°C |
Mounting Type: | Surface Mount |
Package / Case: | 32-VFQFN Exposed Pad |
Supplier Device Package: | 32-VFQFPN (5x5) |
Base Part Number: | ICS854110 |
Description
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The 854110AKILFT application field and working principle play an integral role in the area of Clock/Timing - Clock Buffers, Drivers. The main purpose of the 854110AKILFT is to divide one input clock signal into two independent and galvanically isolated output clock signals synchronized with the original. It is a high performance clock buffer/driver which can drive a large number of clock signals and provide clean, predictable and reliable outputs with very low jitter at high frequency. The 854110AKILFT is ideal for applications in digital broadcast, communications and computer systems requiring clock drivers with low jitter and low EMI/RFI susceptibility.The 854110AKILFT comprises of two main parts: a high speed clock driver and a buffer/driver unit. The buffer/driver unit is designed to drive as many as eight clock signals simultaneously, while the high speed clock driver provides an independent output signal which is synchronized with the input clock signal.The high speed clock driver operates using a digital phase-locked loop (PLL) with a phase detector to measure the phase difference between the input and output signals. The phase detector amplifies the phase difference and sends the amplified information to a voltage controlled oscillator (VCO) to control the output frequency of the high speed clock driver. The PLL locks onto the input clock frequency and sets the output signal frequency of the high speed clock driver to exactly the same frequency as the input signal frequency.The buffer/driver unit of the 854110AKILFT is designed to operate as a multiplexer, providing multiplexed outputs for up to eight clock signal inputs. The buffer/driver unit contains a set of inputs and outputs which are used to control the operation of the buffer/driver unit. The inputs and outputs are connected to a control register that is used to set the multiplexing and output level parameters of the buffer/driver unit.The buffer/driver unit is designed to provide a low-jitter output signal. The buffer/driver unit is designed using a low-noise digital circuitry architecture that is optimized for low-noise operation in high- speed digital systems. The buffer/driver unit is also designed to minimize crosstalk and minimize the magnetic leakage of the output signal.The 854110AKILFT is designed to provide an output signal that is highly accurate and reliable, with low jitter and very low EMI/RFI emission. The 854110AKILFT is ideal for a wide variety of digital broadcast, communication, and computer applications requiring a low-jitter buffered output signal.
The specific data is subject to PDF, and the above content is for reference
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