Allicdata Part #: | 9214DGLF-ND |
Manufacturer Part#: |
9214DGLF |
Price: | $ 0.00 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | IDT, Integrated Device Technology Inc |
Short Description: | IC CLOCK GEN RAMBUS XDR 28-TSSOP |
More Detail: | N/A |
DataSheet: | 9214DGLF Datasheet/PDF |
Quantity: | 1000 |
Ratio - Input:Output: | 1:4 |
Base Part Number: | ICS9214 |
Supplier Device Package: | 28-TSSOP |
Package / Case: | 28-TSSOP (0.173", 4.40mm Width) |
Mounting Type: | Surface Mount |
Operating Temperature: | 0°C ~ 85°C |
Voltage - Supply: | 2.375 V ~ 2.625 V |
Frequency - Max: | 500MHz |
Differential - Input:Output: | Yes/Yes |
Series: | -- |
Number of Circuits: | 1 |
Output: | Clock |
Input: | Clock |
Main Purpose: | Memory, RDRAM; Extreme Data Rate (XDR™) |
PLL: | Yes |
Part Status: | Active |
Packaging: | Tube |
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The 9214DGLF is a 4-bit bidirectional binary rate divider designed for applications in the Clock/Timing - Application Specific category. The device provides very clean clocks and digitally programmable frequency dividers through a simple format in which the input (synchronous) and output (asynchronous) clocks are tightly and accurately synchronized.
The 9214DGLF can be used to facilitate clock distribution in electronic systems with multiple data, address and control signals. Its flexibility and synchronization capabilities, up to 6.25Mhz frequency, make it useful either as a low-frequency synthesizer or as a high-speed frequency divider.
The 9214DGLF is a low-power, low-cost device with a 4-bit wide bidirectional input configuration that can be used to support multiple sources of data, address and control signals. On the input side, the device has two distinct channels to provide more accurate synchronization. One of the channels is designed to take input from the system\'s clock source, and the other channel is designed to take input from the system\'s data, address and control signals.
Any of the four inputs can be output at a frequency that is programmable from several possible frequencies (4.0MkHz, 3.125MKhZ, 2.5MkHz, and 1.25MkHz). The minimum input frequency is 1 kHz. Output frequencies can be set using 4 binary programmable output pins. Data can be re-coded on any of the four outputs as either MSB or LSB as required.
The main working principle of 9214DGLF is based on a 4-bit binary rate divider. This means that each successive bit divides the original frequency by 2, resulting in precisely a 1/4th rate for each output. Each of the four outputs is programmable to a different frequency. This allows for the 96 ratios when all four outputs are combined. The high ratio of integration within the device means that both input and output delays are minimized. This allows for the rapid re-synchronization of the output signals, i.e. the digital data, address and control signals, referenced to the clock source.
The 9214DGLF can be used in a variety of applications in the Clock/Timing-Application Specific category, including clock distribution, self-timed architectures, digital instrumentation and control systems. Its low power, low cost, flexibility and synchronization capabilities make it a useful device for any application requiring accurate frequency-division or synchronization.
The specific data is subject to PDF, and the above content is for reference
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