![AT17C128-10NI Allicdata Electronics](https://files.allicdata.com/upload/common/default.jpg)
Allicdata Part #: | AT17C128-10NI-ND |
Manufacturer Part#: |
AT17C128-10NI |
Price: | $ 0.00 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | Microchip Technology |
Short Description: | IC EEPROM FPGA 128KB 8-SOIC |
More Detail: | N/A |
DataSheet: | ![]() |
Quantity: | 1000 |
1 +: | 0.00000 |
Series: | -- |
Packaging: | Tube |
Part Status: | Obsolete |
Programmable Type: | Serial EEPROM |
Memory Size: | 128kb |
Voltage - Supply: | 4.5 V ~ 5.5 V |
Operating Temperature: | -40°C ~ 85°C |
Package / Case: | 8-SOIC (0.154", 3.90mm Width) |
Supplier Device Package: | 8-SOIC |
Base Part Number: | AT17C128 |
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AT17C128-10NI, also known as CMOS NV Configurable ROM, is a low-power, non-volatile, electronically erasable and programmable read-only memory (EEPROM). It is a memory device used to store configuration information for FPGA devices and is often referred to as a configuration prom for FPGAs. It uses a two-wire serial interface for data input and output.
The AT17C128-10NI offers a wide range of benefits in the application field of FPGA design. It is suitable for high cycles of read-write operations and consumes very low power. With a wide voltage range and high storage capacity, this device can store more than 8K words at a time. This feature makes it ideal for storing large volumes of data, such as customized algorithms and configurations.
In addition, the AT17C128-10NI uses organized, non-volatile memory cells, allowing the device to retain data even if power is removed. This non-volatile nature makes it suitable for applications where data retention is important. It also allows for very precise control of the memory addressing system by word or byte level addressing.
The AT17C128-10NI operates on three basic functions: Program, Read and Erase. The programming process is initiated when the chip is selected and a ‘programming’ command is issued. The Program command tells the chip to write data to its internal memory cells. Once the data is programmed, the Read command is issued. This command tells the chip to read the data from its memory cells and output it on the chip’s serial data line.
The Erase command is used to delete the contents of the chip’s memory. This command can be issued either automatically or through the use of an external programming voltage and an erase control. After the Erase command is issued, the chip will be completely reset and ready to accept new data.
To summarize, the AT17C128-10NI provides a reliable and cost-effective configuration solution for FPGA designs. It is a low-power, non-volatile memory device with a wide range of features and benefits. Its simple programming process, wide voltage range, and high storage capacity make it an ideal choice for storing custom configurations for FPGA devices. Furthermore, its non-volatile nature allows data to be retained even if power is removed, making it suitable for applications where data retention is important.
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