![AT17LV256-10NI Allicdata Electronics](https://files.allicdata.com/upload/common/default.jpg)
Allicdata Part #: | AT17LV256-10NI-ND |
Manufacturer Part#: |
AT17LV256-10NI |
Price: | $ 0.00 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | Microchip Technology |
Short Description: | IC EEPROM FPGA 256KB 8-SOIC |
More Detail: | N/A |
DataSheet: | ![]() |
Quantity: | 1000 |
1 +: | 0.00000 |
Series: | -- |
Packaging: | Tube |
Part Status: | Obsolete |
Programmable Type: | Serial EEPROM |
Memory Size: | 256Kb |
Voltage - Supply: | 3 V ~ 3.6 V, 4.5 V ~ 5.5 V |
Operating Temperature: | -40°C ~ 85°C |
Package / Case: | 8-SOIC (0.154", 3.90mm Width) |
Supplier Device Package: | 8-SOIC |
Base Part Number: | AT17LV256 |
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AT17LV256-10NI application field and working principle
The AT17LV256-10NI is a Configurable Read-Only Memory (PROM), which is made by Atmel Corporation. It is an 8K x 32-bit memory device, equipped with configuration circuitry and programming voltage tolerant pins. This PROM is based on Atmel’s 0.6µm CMOS technology. It is primarily designed to provide FPGA configuration storage and non-volatile code execution.
Application Fields
The AT17LV256-10NI is a PROM device targeting on FPGA configuration storage. It can also be used for non-volatile code execution with its programming voltage tolerant pins. It is typically applied in multiple applications, such as FPGA and microcontroller control unit embedded applications.
Working Principle
The AT17LV256-10NI supports both JTAG and non-JTAG buses. With the JTAG bus, users can program the AT17LV256-10NI they desired FPGA through PC applications. With the non-JTAG bus, users can automatically program the PROM during the FPGA board power-up.
Once reference power is applied, the AT17LV256-10NI will enter its configuration state. Then the AT17LV256-10NI addresses and reads the appropriate FPGA Configuration Pin, thereby controlling the FPGA configuration process. This PROM also supports EXTEST command, which is a function used to accelerate the configuration process. The EXTEST command allows the AT17LV256-10NI to read its internal memory while driving its output latch.
The AT17LV256-10NIincludes internal program address register and the data register, whose content can be read through the JTAG interface. Then, the AT17LV256-10NI is ready to accept commands and data via the JTAG interface, so that users can write the memory contents they desired. Moreover, the AT17LV256-10NI also supports the ID command, which is used to read the device\'s identity information and version information.
The AT17LV256-10NI is designed with two eight-bit configuration register protection bytes. Users can assign a certain combinations of passwords to protect the memory from accidental overwrite. In addition, the AT17LV256-10NI also contains a number of additional registers for monitoring the power and the reset conditions.
Conclusion
To sum up, the AT17LV256-10NI is designed for FPGA configuration storage, with supporting both JTAG and non-JTAG buses. It allows customers to execute non-volatile code, and protect the memory content with passwords. Moreover, the PROM contains additional registers for monitoring the power and reset conditions. The AT17LV256-10NI is a very reliable and easy-to-use PROM device, making it an ideal choice for FPGA and microcontroller control unit embedded applications.
The specific data is subject to PDF, and the above content is for reference
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