CDC2586PAH

Differential - Input:Output:	No/No
Base Part Number:	CDC2586
Supplier Device Package:	52-TQFP (10x10)
Package / Case:	52-TQFP
Mounting Type:	Surface Mount
Operating Temperature:	0°C ~ 70°C
Voltage - Supply:	3 V ~ 3.6 V
Divider/Multiplier:	Yes/Yes
Frequency - Max:	100MHz
Series:	--
Ratio - Input:Output:	1:12
Number of Circuits:	1
Output:	LVTTL
Input:	LVTTL
PLL:	Yes with Bypass
Type:	PLL Clock Driver
Part Status:	Last Time Buy
Packaging:	Tray

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<div class=\'category\'>Clock/Timing—Clock Generators, PLLs, Frequency Synthesizers</div><p>CDC2586PAH is a high-accuracy and low-jitter parameterized 2.4GHz clock generator and PLL for networking and computing applications. The key features of this device include a differential output or a single-ended LVDS output, an adjustable duty cycle control up to 90–110%, as well as an integrated voltage-controlled oscillator (VCO). This clock generator and PLL is ideal for use in networking and communications applications such as networking backplanes, short wave radio networks, wireless LANs and WANs, and 802.11b/g/n standards.</p><h2>CDC2586PAH Application Field and Working Principle</h2><h3>Application Field</h3><p>The CDC2586 PAH is an ideal clock generator and PLL for applications requiring high frequency stability and low-jitter output clocks. It is suitable for networking, computing, communications, and storage systems such as networking backplanes, multiplexers and switches, wireless LANs and WANs, and 802.11b/g/n standards. Additionally, this device is also suitable for medical, automotive, test and measurement, and broadcast equipment that require a high input-to-output timing accuracy.</p><h3>Working Principle</h3><p>The CDC2586PAH is designed to differentiate between two input signals. First, the internal reference clock is generated from the reference clock input. Next, an external input clock is from the input clock input. From these two feed-back signals, the output clock is generated.</p><p>The reference clock is then compared to the input clock. As the compared signals reach the same frequency, the internal phase-locked-loop (PLL) circuit recognizes this condition and automatically begins to bring the two signals into perfect phase alignment. Once the same frequency is tracked, the output clock is generated and the CDC2586PAH works its way through any needed frequency stabilization.</p><p>The CDC2586PAH has independent controls for the VCO gain and DC control. These allow the output frequency and duty cycle to be fine-tuned, ensuring a fast and stable output. Moreover, the device features an auto shut down feature, which helps reduce power losses during periods of inactivity.</p><h3>Conclusion</h3><p>The CDC2586PAH is a flexible and compact clock generator and PLL designed for networking and computing applications that demand high performance and high accuracy. With its low-jitter output, adjustable VCO gain and DC control, as well as integrated auto shut-down feature, this device ensures a reliable and stable operation.</p>

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