CDC421A212RGER Datasheet/PDFCDC421A212RGER is a clock generator, phase locked loop (PLL) and frequency synthesizer manufactured by Cirrus logic. It is a high-speed on-chip Programmable Clock Generator/PLL solution that combines a multiple output, low-noise differential oscillator, PLL and digital programmable frequency synthesizer to reduce the component count, board area and system cost. It features a wide operating range of up to 400MHz and a power-saving, low noise operation.
Application Field
CDC421A212RGER is an ideal solution for a variety of applications including high-speed computing, telecommunications, industrial automation, consumer electronics, data communications, automotive and military platforms. It is suitable for clock genearation and timing needs of most of the devices mentioned above.
CDC421A212RGER is most commonly used in high-speed clock generation and PLL-based designs, from main clock sources to small-signal PLLs, to drive multiple data paths and clock enable multiple devices. It is suitable for systems requiring high-precision performance such as clocked FIFO buffers, high-speed serial communication and precision embedded systems with low-jitter clock sources.
Working Principle
CDC421A212RGER is a high-performance, low-jitter clock generator and PLL that combines a multiple output, low-noise differential oscillator, PLL and digital programmable frequency synthesizer. It features a wide operating range of up to 400MHz and a power-saving, low noise operation.
The device has two separate clock outputs available, a master clock (MCLK) and a system clock (SYSCLK) to accommodate any type of clock and data interface. The master clock is used to clock the PLL and the system clock is used to clock the FIFO. The MCLK signal can be tuned to frequencies up to 400 MHz, while the SYSCLK signal can be tuned up to 200MHz.
The internal phase-locked loop (PLL) is configured through a serial interface and provides low-jitter and frequency-flexible clock sources for most applications. The device also offers an adjustable output frequency and phase-locked loops (PLL) based on a wide input frequency range. This allows the device to support a wide variety of clock sources such as crystal or ceramic oscillators or clock sources with frequency dividers such as PC clocks.
CDC421A212RGER also features a fast-tracking Auto Master Clock Generator (AMCG) that allows for programmable frequency as well as tracking of any input clock. The AMCG allows for a phase shift adjustment and an automatic tuning of the master clock frequency for better clock frequency and phase noise performance.
Conclusion
CDC421A212RGER is an ideal solution for clock generation and timing needs of a variety of applications such as computing, telecommunications, industrial automation, consumer electronics, data communications, automotive and military purpose. It is a high-performance, low-jitter clock generator and PLL that combines a multiple output, low-noise differential oscillator, PLL and digital programmable frequency synthesizer.
It provides a wide operating range of up to 400MHz and a power-saving, low noise operation. It is suitable for systems requiring high-precision performance such as clocked FIFO buffers, high-speed serial communication and precision embedded systems with low-jitter clock sources.