
Allicdata Part #: | DS1080CLU+T-ND |
Manufacturer Part#: |
DS1080CLU+T |
Price: | $ 0.00 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | Maxim Integrated |
Short Description: | IC CRYSTAL MULTIPLIER SS 8-USOP |
More Detail: | N/A |
DataSheet: | ![]() |
Quantity: | 1000 |
Differential - Input:Output: | No/No |
Base Part Number: | DS1080 |
Supplier Device Package: | 8-uMAX |
Package / Case: | 8-TSSOP, 8-MSOP (0.118", 3.00mm Width) |
Mounting Type: | Surface Mount |
Operating Temperature: | -40°C ~ 125°C |
Voltage - Supply: | 3 V ~ 3.6 V |
Divider/Multiplier: | No/Yes |
Frequency - Max: | 64MHz |
Series: | -- |
Ratio - Input:Output: | 1:1 |
Number of Circuits: | 1 |
Output: | LVCMOS |
Input: | Clock, Crystal |
PLL: | Yes |
Type: | Crystal Multiplier, Spread Spectrum Clock Generator |
Part Status: | Obsolete |
Packaging: | Tape & Reel (TR) |
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The DS1080CLU+T is a highly flexible Clock Generator, PLL Frequency Synthesizer with differential LvTTL/CML outputs. It is a configurable two output device with wide-range input clock frequency range. It is capable of producing multiple output frequencies, covering the frequency range from 25MHz to 550MHz. This makes the device suitable for a variety of applications, including: telecommunications, high speed digital signal processes, optical transport networks, and automotive audio.
The DS1080CLU+T has a variety of features that make it a powerful and flexible solution to clock management applications. It offers programmable oscillators and clock synthesizers, programmable output dividers, and programmable output clock frequencies. It also contains integrated non-overlap clock control, signal detection and pulse-out feature. In addition, it provides a wide instability correction range and has low jitter performance.
The protocol used by the DS1080CLU+T is based on the synchronous reference clock and serial port command I2C protocol from the host. The device provides three serial slave interfaces to support different types of communication. The first two interfaces are used for clock data and are of LvTTL / CML type. The third serial slave interface is used for receiving I2C commands.
The working principle of the DS1080CLU+T follows the design of a phase-locked loop (PLL). The outside clock is utilized as the reference clock, and this clock drives the device internally. The internal clock is compared to the incoming reference clock and then frequency and phase adjustments are made in order to achieve desired frequency/phase relationship between the two clocks. This PLL based clock synthesis program is controlled by I2C commands given by the host.
The output clock of the DS1080CLU+T contains several control signals, depending on the configuration of the device and the program registers inside. The device allows for several output clocks, which can be generated simultaneously or on a rotating basis, depending upon the application and clock management plan desired.
The DS1080CLU+T is designed to be a low-cost and flexible solution to clock management applications. It offers a wide-range of operating frequencies and is easily programmed using I2C commands from the host microcontroller.
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