DS91D176TMAX/NOPB

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1. DESCRIPTION

The DS91C176 and DS91D176TMAX/NOPB are 100 MHz single channel M-LVDS (Multipoint Low Voltage Differential Signaling) transceivers designed for applications that utilize multipoint networks (e.g. clock distribution in ATCA and uTCA based systems). M-LVDS is a new bus interface standard (TIA/EIA-899) optimized for multidrop networks. Controlled edge rates, tight input receiver thresholds and increased drive strength are sone of the key enhancements that make M-LVDS devices an ideal choice for distributing signals via multipoint networks. The DS91D176TMAX/NOPB are half-duplex transceivers that accept LVTTL/LVCMOS signals at the driver inputs and convert them to differential M-LVDS signals. The receiver inputs accept low voltage differential signals (LVDS, B-LVDS, M-LVDS, LV PECL and CML) and convert them to 3V LVCMOS signals. The DS91D176TMAX/NOPB has a M LVDS type 1 receiver input with no offset. 

2. FEATURES

    1. DC to 100+ MHz / 200+ Mbps Low Power, Low EMI Operation

    2. Optimal for ATCA, uTCA Clock Distribution Networks

    3. Meets or Exceeds TIA/EIA-899 M-LVDS Standard

    4. Wide Input Common Mode Voltage for Increased Noise Immunity

    5. DS91D176 has Type 1 Receiver Input

    6. DS91C176 has Type 2 Receiver with Fail-safe

    7. lndustrial Temperature Range

    8. Space Saving SOIC-8 Package

3. M-LVDS Receiver Types

The EIA/TIA-899 M-LVDS standard specifies two different types of receiver input stages. A type 1 receiver has a conventional threshold that is centered at the midpoint of the input amplitude, VID/2. A type 2 receiver has a built in offset that is 100mV greater than VID/2. The type 2 receiver offset acts as a failsafe circuit where open or short circuits at the input will always result in the output stage being driven to a low logic state.