ISPLSI 2128E-135LT176 Allicdata Electronics
Allicdata Part #:

ISPLSI2128E-135LT176-ND

Manufacturer Part#:

ISPLSI 2128E-135LT176

Price: $ 0.00
Product Category:

Integrated Circuits (ICs)

Manufacturer: Lattice Semiconductor Corporation
Short Description: IC CPLD 128MC 7.5NS 176TQFP
More Detail: N/A
DataSheet: ISPLSI 2128E-135LT176 datasheetISPLSI 2128E-135LT176 Datasheet/PDF
Quantity: 1000
1 +: 0.00000
Stock 1000Can Ship Immediately
$ 0
Specifications
Series: ispLSI® 2000E
Packaging: Tray 
Part Status: Obsolete
Programmable Type: In System Programmable
Delay Time tpd(1) Max: 7.5ns
Voltage Supply - Internal: 4.75 V ~ 5.25 V
Number of Logic Elements/Blocks: 32
Number of Macrocells: 128
Number of Gates: 6000
Number of I/O: 128
Operating Temperature: 0°C ~ 70°C (TA)
Mounting Type: Surface Mount
Package / Case: 176-LQFP
Supplier Device Package: 176-TQFP (24x24)
Base Part Number: ISPLSI 2128
Description

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The ISPLSI 2128E-135LT176 is an embedded complex programmable logic device (CPLD) that is a field-programmable array of mid-range configurable logic blocks (CLBs). It offers designers a wide range of cost-effective, high-performance applications for consumer, industrial and system-level needs in areas such as digital signal processing, motor control, power management, and RF/analog interface. Its high-density design and ability to support multiple clock domains, virtually zero clock-to-out delays, and integrated dual-port RAM make it ideal for many embedded high-speed design applications.

The ISPLSI 2128E-135LT176 can be configured to serve as a cost-effective replacement for a dozens of complex ASICs, optimizing design flexibility with automatic setup, very small programming hardware and almost no need for implementing complex hardware connections. This CPLD features over 128 macrocells and a multiple clock domain to support up to eight clock phases and can interface with external memory or logic. It is designed to maximize flexibility at minimal cost in order to support a wide range of applications.

The ISPLSI 2128E-135LT176 features a two-level deep pipeline structure and a two-level combinational logic. The two-level combinational logic enables faster operation, by limiting latencies and restricting normal run cycles. In addition, the deep pipeline structure acts as a buffer for data and instructions that can be stored and periodically accessed, improving the speed performance of the CPLD. The double clock domain feature also ensures that the CPLD can be used for applications where very precise timing is required for high-end applications.

As for the working principle of this CPLD, the CPLD\'s combinational logic and state machines are represented by a 4-level logic hierarchy, where each level is programmable and can be used to create a specific logic function. The CPLD design is then translated into the device\'s internal programming language and from there it is loaded onto the CPLD. Once the CPLD is programmed, it is ready to perform the designed logic function.

In this way, the ISPLSI 2128E-135LT176 makes an ideal solution for a wide range of embedded applications, such as digital signal processing, motor control, power management, and RF/analog interfaces. Its combination of low programming overhead, cost-effective design, and high-performance capabilities make it a great choice for many embedded design requirements.

The specific data is subject to PDF, and the above content is for reference

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