MAX9491ETP010+

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Clock Generators, PLLs and Frequency Synthesizers provide the essential timing signals needed for synchronizing the majority of electronic system functions. The popular MAX9491ETP010+ is a versatile clock synthesizer with features that make it highly suitable for many applications. This article provides an overview of the MAX9491ETP010+ application field as well as the working principle on which it operates.

Application Field

The MAX9491ETP010+ is an integrated general-purpose clock synthesizer consisting of a low-skew differential crystal oscillator and a fully-configurable, high-speed phase-locked loop (PLL). It includes transmit and receive pins for two independent differential reference clocks that together enable automated switchover between two independent clock sources. With its low output jitter, low-power consumption and high levels of integration, the MAX9491ETP010+ is ideal for avionics, communications systems, data acquisition systems, CCTV/video surveillance applications, as well as for interconnecting different systems, clock distribution and miniaturization.

Working Principle

The MAX9491ETP010+ operates on the basis of fractional-N (N-1/N+1) phase-locked loop (PLL) frequency synthesis. This technique is a method used to generate an output frequency that has an integer multiple (N) of the input frequency (FIN) and is independent of any reference clock faults. To synthesise the output frequency the circuit uses an N-1/N+1 PLL and a hybrid binary counter, where the output frequency (FOUT) can be expressed as:

FOUT = n(N-1/N+1) x FIN⁄ m

where n is the integer value of n in the PLL and m is the count of the hybrid binary counter. The circuit itself is composed of several elements that interact with each other, such as a differential oscillator, PLL, a Voltage-Controlled Oscillator (VCO), a differential output driver, a start-up circuit, an enable/disable function, a reset function and the hybrid binary counter.

The MAX9491ETP010+ can be configured in two modes: Synthesis Mode and Clock Monitor Mode. In the Synthesis Mode the MAX9491ETP010+ is used to generate a wide range of output frequencies based on a known input frequency. In the Clock Monitor Mode, the circuit monitors two different input clock sources and automatically switches over to the other one in the case of reference faults (missing clock, false clock, too low/too high). This provides a robust, automated, cost-effective and versatile solution for clock reference fault monitoring and correction.

The MAX9491ETP010+ has an input frequency range of 10MHz to 50MHz, which enables synthesizing all the popular output clock frequencies - from the common 28.0000MHz and 48.0000MHz to the more unusual 34.5678MHz, for example. The maximum output frequency range is 0.8MHz to 297MHz and the output jitter is <150fsRMS. The supply voltage is 1.8V and the power consumption is typically 20mW.

The MAX9491ETP010+ integrates two independent differential reference inputs (Tx/RxP and Tx/RxN) that together enable a fully automated switchover between two independent clock sources. This feature eliminates the need for manual intervention and significantly reduces power consumption.

In summary, the MAX9491ETP010+ clock synthesizer is well-suited to a wide range of applications. Its low power consumption, high levels of integration and small package size make it an attractive option for engineers and professionals alike.

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