| Allicdata Part #: | MC100LVEL33DGOS-ND |
| Manufacturer Part#: |
MC100LVEL33DG |
| Price: | $ 4.13 |
| Product Category: | Integrated Circuits (ICs) |
| Manufacturer: | ON Semiconductor |
| Short Description: | IC DIVIDER DIV X4 ECL DIFF 8SOIC |
| More Detail: | Counter IC Divide-by-4 1 Element 1 Bit Positive, N... |
| DataSheet: | MC100LVEL33DG Datasheet/PDF |
| Quantity: | 44 |
| 1 +: | $ 3.75480 |
| 10 +: | $ 3.37365 |
| 100 +: | $ 2.76413 |
| 500 +: | $ 2.35305 |
| 1000 +: | $ 1.98450 |
| Timing: | -- |
| Base Part Number: | 100LVEL33 |
| Supplier Device Package: | 8-SOIC |
| Package / Case: | 8-SOIC (0.154", 3.90mm Width) |
| Mounting Type: | Surface Mount |
| Operating Temperature: | -40°C ~ 85°C |
| Voltage - Supply: | 3V ~ 3.8V |
| Trigger Type: | Positive, Negative |
| Count Rate: | 4GHz |
| Series: | 100LVEL |
| Reset: | Asynchronous |
| Number of Bits per Element: | 1 |
| Number of Elements: | 1 |
| Direction: | -- |
| Logic Type: | Divide-by-4 |
| Part Status: | Active |
| Packaging: | Tube |
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.The MC100LVEL33DG is a dual differential CML to LVDS translator from the MC100 family of ICs manufactured by ON Semiconductor. This device provides a compact, cost-effective solution for converting gigabit high-speed differential signals based on low-voltage differential signaling (LVDS) in applications using copper lines. The MC100LVEL33DG is designed for use in a wide range of applications, including gigabit communications, consumer and automotive systems, as well as general data I/O. The device is a low-voltage, ESD tolerant, dual differential CML to LVDS translator with enable input. The MC100LVEL33DG belongs to the Logic - Counters, Dividers family.
The MC100LVEL33DG has two differential CML input ports, each with an enable input, and two LVDS output ports. The device’s enable inputs allow the user to disable the differential CML inputs and the outputs or to enable them to receive data. The MC100LVEL33DG has a 20-bit LVDS output buffer, with 10-bit selection capability per port. Additionally, the device has an integrated power-on reset circuit and slew rate control buffers to ensure the output signals are compliant with LVDS standards. The MC100LVEL33DG is designed for data rates of up to 1.6 Gbps, making it suitable for a wide range of applications.
The MC100LVEL33DG works by converting differential CML inputs to LVDS outputs. The device has two differential CML inputs, each with an enable input. When enabled, differential CML input signals are converted to LVDS outputs. The enable inputs allow the user to enable or disable the differential inputs, LVDS outputs, or both. Additionally, the device has a 20-bit LVDS output buffer with 10-bit selection, allowing the user to select which output bits they want to use. The device also has an integrated power-on reset circuit and slew rate control buffers, allowing the output signals to be compliant with LVDS standards.
The MC100LVEL33DG is used in a wide range of applications, including gigabit communications, consumer and automotive systems, as well as general data I/O. The device is ideal for use in systems that require high-speed I/O, as it operates at data rates of up to 1.6 Gbps. The device is also low-voltage, which makes it suitable for use in portable and low-power systems. Furthermore, the device is ESD tolerant, making it robust in harsh environments.
In summary, the MC100LVEL33DG is a dual differential CML to LVDS translator from the MC100 family of ICs by ON Semiconductor. The device is part of the Logic - Counters, Dividers family and is used for applications that require a cost-effective, low-voltage solution for converting high-speed differential signals based on LVDS. The device has two differential CML inputs, each with an enable input, as well as two LVDS output ports. It is designed for data rates of up to 1.6 Gbps and is ESD tolerant. The device is suitable for use in applications such as gigabit communications, consumer and automotive systems, as well as general data I/O.
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MC100LVEL33DG Datasheet/PDF