MCP100-485HI/TO

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MCP100-485HI/TO supervisor ICs are advanced, highly integrated solutions for robust power system supervision and monitoring, offering a very low power standby and consuming a nominal current of only 500nA. These devices are ideal for applications such as industrial and mobile telecommunications.

The MCP100-485HI/TO supervisor ICs family includes a power-on reset (POR), power-down reset (PDR) with adjustable timeout and watchdog timer functionality. Its advantages include a wide operating temperature range from -40°C to 125°C; and a low 2.4V voltage-drop threshold for reset and reset timeout.

The MCP100-485HI/TO supervisor ICs family is available in three-pins or four-pins versions, depending on the application requirements. To simplify power-up sequencing, the device is equipped with a reset hysteresis for a precise reset threshold detection and fail-safe reset sequencing. Also, the watchdog timer includes a regular pulse output and an optional functionality to stay in reset state until a “resume” sequence is initiated by the host processor.

The MCP100-485HI/TO is a power management integrated circuit (PMIC) that serves as a supervisor to ensure proper start-up, steady state, and low-power operation. It is used to prevent large chaotic currents from interrupting supply rail paths and to shut down power rails in the case of over-voltage or over-current conditions, as well as supervising reset and power conditioning during normal reset procedures. It also serves as a watchdog timer for fault detection to allow for recovery when process loads fail and to manage the switching times of system-level power rails.

The MCP100-485HI/TO has a POR and PDR function, both using the same voltage threshold that can be adjusted by the external resistor. The POR function will reset the microcontroller after power-up while the PDR function with adjustable timeout will reset the microcontroller when the supply voltage drops below the preset lower limit. Also, an independent voltage monitor generates reset signals when the voltage drops near the reset threshold, thus allowing for efficient power management.

The watchdog timer’s regular pulse output is generated by an internal oscillator. With the addition of an external capacitor register, the frequency of the pulse can be adjusted through programming, to keep the consumption current in a minimum. In addition to the watchdog timer, there is also an optional “stay-in-reset” function designed for certain applications. This function permits a host processor to generate a reset pulse to let the IC reset for a minimum amount of time, such as during a software update or application correction flow.

In summary, the MCP100-485HI/TO is a power management integrated circuit (PMIC) that provides low-power operation, precision start-up, monitoring of supply rails and fault detection with watchdog timer. It is most commonly applied to industrial and mobile telecommunications applications. It is available with either three-pins or four-pins, offering the ability to optimize power sequence and prevent chaotic currents.

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