PI90LVT14LE Allicdata Electronics
Allicdata Part #:

PI90LVT14LE-ND

Manufacturer Part#:

PI90LVT14LE

Price: $ 0.00
Product Category:

Integrated Circuits (ICs)

Manufacturer: Diodes Incorporated
Short Description: IC CLK BUFFER 2:5 250MHZ 20TSSOP
More Detail: Clock Fanout Buffer (Distribution), Multiplexer IC...
DataSheet: PI90LVT14LE datasheetPI90LVT14LE Datasheet/PDF
Quantity: 1000
1 +: 0.00000
Stock 1000Can Ship Immediately
$ 0
Specifications
Series: --
Packaging: Tube 
Part Status: Obsolete
Type: Fanout Buffer (Distribution), Multiplexer
Number of Circuits: 1
Ratio - Input:Output: 2:5
Differential - Input:Output: Yes/No
Input: LVDS, LVTTL
Output: LVDS
Frequency - Max: 250MHz
Voltage - Supply: 3 V ~ 3.6 V
Operating Temperature: -40°C ~ 85°C
Mounting Type: Surface Mount
Package / Case: 20-TSSOP (0.173", 4.40mm Width)
Supplier Device Package: 20-TSSOP
Base Part Number: 90LVT14
Description

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PI90LVT14LE is a low voltage/low skewing clock buffer/driver IC that is a highly advanced buffer/driver with an output timing of 3.2. ns max. and provides 10 outputs, either with the same or independent delay of these clocks. It is used to buffer and drive clock signals within and between several integrated circuits (ICs). All PI90LVT14LE devices offer direct interface to LVTTL logic.

The PI90LVT14LE clock buffer/driver can provide four clock banks/sets of outputs, which are named as clock A, B, C and D. Each clock of a set can have independent output delays to compensate for the delay, through the PCB transmission lines or other interconnects.

The main purpose of the PI90LVT14LE is to provide a low-skew, single-ended clock input with multiple outputs. The clock input is designed to provide a very low jitter output, as well as providing a very low noise input. It can handle large inductive, capacitive, and thermal loads. The PI90LVT14LE also features active high and low fan-out capabilities with freqency scaling that allows for low-skew and low-jitter byte-wide address and data buses.

The PI90LVT14LE is capable of driving up to 10 outputs. This allows for the user to accommodate a large variety of output configurations. The output\'s clock synchronization is adjustable via the user-selectable CMOS register settings. This allows for faster setup and improved operation in applications that require more than one clock cycle synchronization between multiple output banks/sets.

The working principle of the PI90LVT14LE is quite simple. It has two clock inputs, referred to as "clock A" and "clock B". The clock inputs are used to generate a high-speed differential clock signal at the output. The output signal is then divided into four clock banks (A, B, C and D) by the divider unit within the IC. The divider unit then translates the differential clock signal into the required outputs.

The PI90LVT14LE also features a built-in clock gating circuit that is controlled by a CMOS register. This allows for lower power consumption and improved flexibility of the device when using multiple clock inputs. The clock gating circuit is also useful in applications that require synchronization of multiple clock outputs, as the gating circuit allows for a smooth transition between different clock frequencies.

The PI90LVT14LE is used in a wide variety of applications. It can be used to drive clocks in high-speed processors, such as microprocessors and digital signal processors. It is also used to drive clocks in high-speed communication systems, such as gigabit ethernet and SONET. Additionally, the PI90LVT14LE is used in various high-bandwidth embedded systems, such as system-on-chip (SoC) designs, video and audio systems, digital video broadcasting (DVB) systems, automotive systems, and aerospace systems.

In summary, the PI90LVT14LE is a highly advanced buffer/driver IC designed for low voltage/low skew clock buffering and driving applications. It features two independent clock inputs, four clock banks/sets, and a maximum output timing of 3.2 ns. Additionally, it can be used in a wide variety of applications that require low-skew, low-jitter clock signals.

The specific data is subject to PDF, and the above content is for reference

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