Allicdata Part #: | PT7C5027C1-5BUWF-ND |
Manufacturer Part#: |
PT7C5027C1-5BUWF |
Price: | $ 0.00 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | Diodes Incorporated |
Short Description: | IC CLOCKING XO |
More Detail: | N/A |
DataSheet: | PT7C5027C1-5BUWF Datasheet/PDF |
Quantity: | 1000 |
Series: | * |
Part Status: | Obsolete |
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Application Field
The PT7C5027C1-5BUWF is an ideal clock generator solution for wireless local area networks (WLAN), Wi-Fi, DSL, set-top boxes and other consumer applications which need a low-cost, low-jitter, high-accuracy and high-reliable clock source. It also suits well to applications in industrial automation, optical networks and etc.
Working Principle
The PT7C5027C1-5BUWF uses on-chip PLL circuitry integrated with an internal voltage controlled oscillator (VCO) to generate high-frequency output clocks. The VCO frequency is stable and adjustable between 2~ 400MHz. The output clock of the PT7C5027C1-5BUWF is generated from the dividing down the VCO frequency output by the user-programmed divider logic. It also supports a wide variety of output formats such as LVPECL, LVDS or CMOS.
The PT7C5027C1-5BUWF features dual LVCMOS reference input clocks, please refer to the datasheet for selecting reference input frequency range versus expected output dividers. One of those two reference clocks may be disabled in order to enforce a single reference source configuration.
The PT7C5027C1-5BUWF also offers a wide range of output dividers’ selector to provide flexibility of the user. The output dividers ratio can range from 1 to 256 and can be programmed by the user in 2-bit increments. Different output dividers number generates different output frequencies.
The output buffer of the PT7C5027C1-5BUWF uses an active inductor-based termination, which maintains the transmission impedance between the clock output and its destination/cable impedance. It enables the buffer stage in the PT7C5027C1-5BUWF to push and pull outputs with relative low output pull-in and pull-out ranges.
The PT7C5027C1-5BUWF also has a patented calibration circuitry which compensates any process, temperature and voltage variations. With the patented calibration circuitry, the frequency drift of PT7C5027C1-5BUWF is perfectly minimized and it is less than +5 ppm after 500-hour full temperature cycle.
Conclusion
The PT7C5027C1-5BUWF is designed for those applications which need a low-cost, low-jitter, high-accuracy, and high-reliable clock source. It also provides wide range of output dividers selection and an on-chip calibration circuitry for temperature and voltage variations, making it a perfect choice for industrial automation, optical networks, and other consumer applications.
The specific data is subject to PDF, and the above content is for reference
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