S-80133CLMC-JIST2G

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The S-80133CLMC-JIST2G is a highly integrated low power supervisor IC with features such as Serial Peripheral Interface (SPI) interface and internal register control. It is designed to monitor microprocessor reset line, supply voltage levels and process temperature, and provides reset signal to system, power switch and processor, as well as various signal interrupts. The S-80133CLMC-JIST2G provides versatile overvoltage protection circuit, temperature protection and various embedded protections, making it an ideal choice for various cost-sensitive applications.

The S-80133CLMC-JIST2G is designed to function as the supervisor in power management systems, providing protection to the system and processor in the event of overvoltage or over temperature events. It also provides reset outputs for system or processor reset control and can detect multiple power supply rails, as well as internal or external temperature. The S-80133CLMC-JIST2G can be used to monitor and control various power supply conditions, such as supervising the main power input voltage, supply voltage levels, temperature and system reset line, and providing reset signal and signal interrupts to the appropriate system; when the supervisor detects an overvoltage or over temperature condition, the system and processor are reset for protection or notified of the condition via I2C, SMBus or UART protocol.

The built-in power-on reset detection circuit on the S-80133CLMC-JIST2G is designed to ensure power-on reset of the system, providing a low-power reset signal with an accurate, jitter-free pulse generated by the built-in watchdog timer. The S-80133CLMC-JIST2G also features a programmable operation mode, which allows changing the supervisor operation characteristics to meet various system design specifications. The various built-in registers provide multiple ways to configure the S-80133CLMC-JIST2G to suit the system design, such as setting thresholds, enabling/disabling warning alarms and triggering/deactivating reset outputs.

The watchdog timer of the S-80133CLMC-JIST2G monitors for system hang or watch-dog events and can be configured to reset the system immediately in the event of a reset. The timer can be enabled/disabled via an external signal or by configuring internal registers. The timer has an 8-bit reference window, which is adjustable from 1 to 256 cycles. The timer can also be used to generate interrupts or trigger a reset if a system abnormality is detected.

The S-80133CLMC-JIST2G\'s brown-out/power-up detection circuit is designed to generate a reset signal in the event of a sudden power drop or rise. It is capable of monitoring voltage levels over a wide range and can be configured via on-chip registers for different power supplies and for reset thresholds. The S-80133CLMC-JIST2G also features a configurable temperature monitoring function to prevent over temperature of the system.

The S-80133CLMC-JIST2G has an on-chip reset manager that can be used to manage system reset. It provides various reset sources and reset types, such as power-on reset, software reset, watchdog timer reset, temperature reset and external reset. Furthermore, it is designed such that system reset configuring of numerous parameters can be done through on-chip registers via I2C, SMBus or UART protocol.

The S-80133CLMC-JIST2G is therefore an ideal solution for a wide range of cost-sensitive applications, providing versatile system protection and reset control. With its high integration level and low power consumption, the S-80133CLMC-JIST2G offers a very cost-effective solution for low power applications.

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