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PMIC - Supervisors: S-80135CNMC-JKUT2U Application Field and Working Principle

Introduction

The S-80135CNMC-JKUT2U is a high performance supervisors designed by SAnjin Semiconductor, it is an integrated power-on reset and power-down reset supervisor IC that provide functions of reset signal generation and signal redriection and so on. This device helps to protect systems from the damaging consequences of power transients and brownouts. Additionally, this device provides a software reset when desirable from the system application. It is intended for use in embedded systems, industrial/consumer applications and other board applications in which power-on reset and/or power-down reset may be required.

Application Field

The S-80135CNMC-JKUT2U power-on reset and power-down reset system is widely used in varies embedded systems, industrial/consumer applications and other board applications. It has various functional advantages as following:

• Protection against supply transients. This device features an active high power-on and power-down reset system which have the ability to detect supply transients that would otherwise cause system restarts. This device can also protect against power glitches and brownouts, giving guarantee of system performance and stability.
• Input current protection. This device also has an internal current-limiting circuit for input protection that offers a larger assured safe operating zone during power transients and/or brownouts.
• Software reset. This device can be forced to perform a software reset via active low RESET pin or it can be triggered by reset register that can be set or cleared by software.

Working Principle

The S-80135CNMC-JKUT2U power-on reset and power-down reset supervisor operates by monitoring the ADC pin voltage. When the ADC pin voltage enters the WARNING Zone, the RESET pin will start its reset sequence until the ADC pin voltage is pulled back to the non-reset zone. The device can also be reset by the active low RESET pin. Additionally, when the RESET pin goes high, the device will be triggered to perform a reset.

The S-80135CNMC-JKUT2U consists of power-on reset circuitry (POR), one-shot timer, automatic power-down reset circuit (PDR) as well as several features to protect the device from internal ESD and overvoltage damage. The POR circuitry is formed by a thin-film resistor divider which provides a threshold below which the RESET pin will be driven low. The PDR circuit is formed by a voltage monitor circuit having a threshold above which an internal power-down reset signal is provided.

Conclusion

The S-80135CNMC-JKUT2U power-on reset and power-down reset supervisor is an excellent solution for embedded systems and industrial/consumer applications. It provides features such as power-on and power-down reset, software reset and internal current-limiting circuit for input protection, all of which help to ensure system stability and performance.

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