
Allicdata Part #: | 336-4643-ND |
Manufacturer Part#: |
SI5340D-D-GM |
Price: | $ 0.00 |
Product Category: | Integrated Circuits (ICs) |
Manufacturer: | Silicon Labs |
Short Description: | IC JITTER ATTENUATOR/MULTIPLEXER |
More Detail: | N/A |
DataSheet: | ![]() |
Quantity: | 1000 |
Moisture Sensitivity Level (MSL): | 2 (1 Year) |
Lead Free Status / RoHS Status: | Lead free / RoHS Compliant |
Specifications
Ratio - Input:Output: | 4:4 |
Supplier Device Package: | 44-QFN (7x7) |
Package / Case: | 44-VFQFN Exposed Pad |
Mounting Type: | Surface Mount |
Operating Temperature: | -40°C ~ 85°C |
Voltage - Supply: | 1.71 V ~ 3.47 V |
Divider/Multiplier: | Yes/No |
Frequency - Max: | 350MHz |
Differential - Input:Output: | Yes/Yes |
Series: | -- |
Number of Circuits: | 1 |
Output: | CML, HCSL, LVCMOS, LVDS, LVPECL |
Input: | LVCMOS, LVDS, LVPECL, Crystal |
PLL: | Yes |
Moisture Sensitivity Level (MSL): | -- |
Part Status: | Active |
Lead Free Status / RoHS Status: | -- |
Packaging: | Tray |
Description
Due to market price fluctuations, if you need to purchase or consult the price. You can contact us or emial to us: sales@allicdata.com
The SI5340D-D-GM is a highly integrated, 50-Ohm matched Clock/Timing - Clock Generators, PLLs, Frequency Synthesizers, offering low jitter, low power consumption and high performance timing solutions. It is ideal for applications that require jitter performance of less than 5ps RMS. The SI5340D-D-GM utilizes two independent programmable synthesizers, allowing for the input of two different clock sources. Each synthesizer can be independently enabled, allowing for the input of one source clock to be converted to one or multiple output frequencies.The primary benefit of the SI5340D-D-GM is its low power consumption. It utilizes a DC-to-DC converter technology to provide an extremely low-power, high-accuracy, clock/timing solution. The device consumes only 0.18 watts of power when operating at full speed and only 0.14 watts when using its reduced frequency mode. This makes the device highly suitable for portable and battery-operated applications.The SI5340D-D-GM has a variety of features designed to ensure low-noise performance, low-jitter, and high output frequency accuracy. It features an integrated 50-ohm balanced output driver which is capable of providing a clean clock signal with minimal distortion. The device has advanced clock synthesis techniques such as frequency multiplication, frequency tripling and frequency splitting, providing flexible clock solutions. This enables the SI5340D-D-GM to provide a wide range of output frequencies from a single source clock.The SI5340D-D-GM also features a low-jitter, LVCMOS output, allowing for compatibility with a wide variety of system designs. The device also has programmable output phase, enabling phase-shift adjustable clock solutions. This combined with the low-jitter, flexible clock synthesis techniques and low-power consumption, makes the SI5340D-D-GM an ideal solution for a broad range of applications such as:• Set-top boxes • Networking equipment • Data communications applications • Home automation systems • Automotive applications • Industrial control systemsIn addition to its low-power, low-jitter, and high-accuracy features, the SI5340D-D-GM also features advanced features such as selectable output duty cycle and programmable skew. The duty cycle can be set to 50%, 66%, or 75% and the skew is adjustable, making it possible to optimize the timing requirements for each clock output.Overall, the SI5340D-D-GM is an ideal Clock/Timing - Clock Generators, PLLs, Frequency Synthesizers, providing low-jitter, low-power and high-accuracy solutions for a wide range of applications. It is capable of providing low-jitter, high-accuracy and low-power clock solutions for applications that require stable and reliable performance. The flexible clock synthesis techniques, adjustable phase-shift and duty cycle, and low-jitter, are the key strengths of the SI5340D-D-GM, allowing for the design of custom timing solutions.The specific data is subject to PDF, and the above content is for reference
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