![SI5367/68-EVB Allicdata Electronics](https://files.allicdata.com/upload/common/default.jpg)
Allicdata Part #: | SI5367/68-EVB-ND |
Manufacturer Part#: |
SI5367/68-EVB |
Price: | $ 137.92 |
Product Category: | Development Boards, Kits, Programmers |
Manufacturer: | Silicon Labs |
Short Description: | BOARD EVAL FOR SI5367/68 |
More Detail: | SI5367, SI5368 Clock Generator Timing Evaluation B... |
DataSheet: | ![]() |
Quantity: | 1 |
1 +: | $ 124.12900 |
Series: | -- |
Part Status: | Active |
Type: | Timing |
Function: | Clock Generator |
Embedded: | -- |
Utilized IC / Part: | SI5367, SI5368 |
Primary Attributes: | -- |
Supplied Contents: | Board(s), Cable(s) |
Secondary Attributes: | -- |
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The SI5367/68-EVB is an evaluation board and kit designed for use with the Silicon Labs’ Si5367/68 clock generator ICs. These ICs are intelligent, low-power frequency, jitter-generation, clock-management solutions with integrated PLLs that feature low phase-jitter and frequency stability over a wide range of temperatures and conditions. The board allows users to quickly evaluate the performance of the ICs and quickly develop system-level designs. It features Digital PLLs that provide unparalleled flexibility and control over output signals.
The SI5367/68-EVB is a comprehensive package that includes a controller board, an FPGA board, a USB cable, a clock output header, a USB power supply, a DC-DC converter, and a software CD.
The controller board is an integrated system with a high degree of functionality. It features a total of six bands, four of which are independent. Each band has two inputs, three outputs, and one set of feedback dividers. The board also includes a USB controller, an I2C controller for configuration, a serial port interface to the onboard FPGA, and an SPI bus for programming.
The FPGA board contains the proprietary FPGA Core Unit Modules, and includes two main blocks which have been mated together on the backplane using connectors. The Core Unit Module comprises a 32-bit RISC processor, developed number of clock I/O channels, high-resolution analog-to-digital converters, and configurable general-purpose I/O pins. This board also includes an FPSoC (Field Programmable System-on-Chip) that allows users to easily modify or create their own PLL configurations for custom designs.
The USB cable connects the controller board and the FPGA board to a computer for data transfer and control. The DC-DC converter and USB power supply provide a steady power supply for the board. The clock output header allows the user to connect an oscilloscope or other test equipment to the board to view the varying outputs from the board.
The included software CD allows the user to access the user interface and configure the board’s settings for different scenarios. The user can easily adjust the board’s parameters and the clock dividers. The software allows the user to program and change the board’s settings, as well as observe the timing diagrams.
The SI5367/68-EVB can be used for a variety of applications related to clocking, such as radio transceivers, media players, modems, and output signal conditioning. The board is ideal for applications in audio/video broadcast, consumer electronics, and automotive audio systems. The board can also be used in a wide array of embedded systems to generate clock frequencies between 1 kHz and 550 MHz.
In terms of working principle, the board allows users to easily set up a PLL and/or adjust frequency and phase-shift settling times for varying IC settings. The board offers a great deal of flexibility as it can be used to generate frequency sweeps and clock modulation. Additionally, the board’s input can accept a wide variety of signals, including LVDS, LVCMOS, SYSREF, and clock references from external sources.
The SI5367/68-EVB is a powerful evaluation board and kit with a wealth of features and capabilities. It is easy to set up and configure and features a wide variety of applications. This board is an ideal solution for anyone who is looking for an efficient and reliable clocking solution for their embedded system.
The specific data is subject to PDF, and the above content is for reference
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