Max Propagation Delay @ V, Max CL:	20ns @ 5V, 15pF
Base Part Number:	74LS112
Package / Case:	16-SOIC (0.154", 3.90mm Width)
Mounting Type:	Surface Mount
Operating Temperature:	0°C ~ 70°C (TA)
Current - Quiescent (Iq):	6mA
Voltage - Supply:	4.75 V ~ 5.25 V
Current - Output High, Low:	400µA, 8mA
Trigger Type:	Negative Edge
Series:	74LS
Clock Frequency:	45MHz
Number of Bits per Element:	1
Number of Elements:	2
Output Type:	Differential
Type:	JK Type
Function:	Set(Preset) and Reset
Part Status:	Active
Packaging:	Tape & Reel (TR)

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Logic - Flip Flops

The SN74LS112ADR is a synchronous, dual positive-edge triggered JK flip-flop with preset, clear and complementary outputs. It is part of the widely used 74LS series of TTL integrated circuits. The \'SN\' stands for \'Schmitt trigger\', which provides superior noise immunity compared to other TTL devices. The JK flip-flop is a building block of digital logic and is widely used in many computing, gaming and graphics applications. It is one of the basic components of memory and shift registers.
The SN74LS112ADR is a logic-level device, meaning it uses only voltage levels to signify a logic high and logic low. It uses both positive and negative voltages for power and ground, meaning it is non-inverting. The device has eight pins, four for input and four for output, and is available in a 20-pin package.
In order to understand the basic behaviour and purpose of the SN74LS112ADR, it is important to have an understanding of the concept of Flip-Flops. Flip-Flops are a type of memory cell or circuit element that stores one bit of data. These cells or elements are connected to one or more input control signals and, when the inputs are in a certain configuration, the output will change depending on the values of the inputs. Flip-Flops can be divided into two main categories: asynchronous and synchronous.
The SN74LS112ADR falls into the synchronous category, meaning that its outputs will be affected by inputs synchronously, which is faster and more efficient than asynchronous behaviour. It is a dual positive-edge triggered JK Flip-Flop, meaning it has two inputs (J and K) and two outputs (Q and q). The inputs and output are activated when a positive edge (rising edge) is detected.
The SN74LS112ADR has three control inputs: preset, clear and toggle. These are used to control the state of the outputs. When the preset input (PR) is high, the output is set to logic high, and when the clear input (CLR) is high, the output is reset to logic low. The toggle input (T) is used to change the state of the output from high to low or low to high every time it is activated.
The SN74LS112ADR has many applications, including memory, shift registers, multiplexers, digital timers, counters, and state machines. It is also used in logic networkapplications such as logic controllers, trigger circuits, and logic gates.
The SN74LS112ADR is a powerful and versatile logic device. It is a low-cost and reliable solution for many applications that require control, storage and computation of binary data. With its combination of preset, clear and toggle features, it is a popular choice for digital logic designs.

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