TPS72301DBVT

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1. Description

The TPS72301DBVT low-dropout (LDO) negative voltage regulator offers an ideal combination of features to support low noise applications. This device is capable of operating with input voltages from –10 V to –2.7 V, and support outputs from –10 V to –1.2 V. This regulator is stable with small, low-cost ceramic capacitors, and include enable (EN) and noise reduction (NR) functions. Thermal short-circuit and over-current protections are provided by internal detection and shutdown logic. High PSRR (65 dB at 1 kHz) and low noise (60 μVRMS) make the TPS723 ideal for low-noise applications. The TPS723 uses a precision voltage reference to achieve 2% overall accuracy over load, line, and temperature variations. Available in a small SOT23-5 package, the TPS723 is fully specified over a temperature range of –40°C to 125°C.

2. Features

    1. Ultralow noise: 60 μVRMS typical

    2. High PSRR: 65 dB typical at 1 kHz

    3. Low dropout voltage: 280 mV typical at 200 mA, 2.5 V

    4. Available in –2.5-V and adjustable (–1.2 V to –10 V) versions

    5. Stable with a 2.2-μF ceramic output capacitor

    6. Less than 2-μA typical quiescent current in shutdown mode

    7. 2% overall accuracy (line, load, temperature)

    8. Thermal and over-current protection

    9. Packages:

        – SOT23-5 (DBV)

        – SOT23-5 (DDC)

        – WSON-6 (DRV)

  10. Operating junction temperature range: –40°C to 125°C

3. Applications

    1. Optical modules

    2. Semiconductor manufacturing

    3. Medical accessories

    4. Oscilloscopes

    5. Active antenna system mMIMO (AAS)

4. Pin Configuration

5. Pin Functions

6. Feature Description

1. Current Limit

The TPS723 has internal circuitry that monitors and limits output current to protect the regulator from damage under all load conditions. When output current reaches the output current limit (550 mA typical), protection circuitry turns on, reducing output voltage to ensure that current does not increase. See Figure 9 in the Typical Characteristics section. Do not drive the output more than 0.3 V above the input. An output voltage more than 0.3 V above the input voltage biases the body diode in the pass FET, and allows current to flow from the output to the input. This current is not limited by the device. If this condition is expected, make sure to externally limit the reverse current.

2. Enable

The enable pin is active above +1.5 V and below –1.5 V, allowing it to be controlled by a standard TTL signal or by connection to VI if not used. When driven to GND most internal circuitry is turned off, putting the TPS723 into shutdown mode, drawing 2-μA maximum ground current.

3. Device Functional Modes

Driving EN over 1.5 V or below –1.5 V turns on the regulator. Driving EN between –1.5 V and +1.5 V puts the regulator into shutdown mode, thus reducing the operating current to 100 nA, nominal.

7. Power Dissipation

The ability to remove heat from the die is different for each package type, presenting different considerations in the printed circuit board (PCB) layout. The PCB area around the device that is free of other components moves the head from the device to the ambient air. Performance data for JEDEC low- and high-K boards are given in the Thermal Information table near the front of this data sheet. Using heavier copper increases the effectiveness in removing heat from the device. The addition of plated through-holes to heat-dissipating layers also improves heatsink effectiveness. Power dissipation depends on input voltage and load conditions. Power dissipation is equal to the product of the output current times the voltage drop across the output pass element.