ZL30117GGG2

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ZL30117GGG2 is an Integrated Clock Multiplier and Jitter Attenuator from IDT. It is a precision 10-output clock multiplication and jitter attenuation IC that provides user-programmable Integer Multiplication, Frequency Synthesis and Fixed Clock Output functions.

ZL30117GGG2 generates a wide range of clock frequencies from a 13-90 MHz input reference clock. Each of the ten outputs supports four different clock synthesis modes, including Integer-Mode Clock Multiplication, Loop Synthesis to generate a target frequency in both High Frequency and Low Frequency synthesis modes, and Fixed Frequency synthesis mode. It can be used to generate programmable clock output frequencies starting at 26–180 MHz. Additionally, all outputs support a programmable spread spectrum mode. The input frequency is divided internally to allow for lower output frequency operation from a higher input frequency. The divide factor is programmable in Integer-Mode Multiplication mode.

ZL30117GGG2 has been designed for mobile applications, networking, computing and communications markets. It allows designers to minimize the effect of jitter and clock drift on their system designs, helping to ensure better accuracy and better timekeeping performance. It is an ideal choice for applications where high performance, low jitter and low power dissipation are required.

The device integrates differential input and output based jitter attenuator. The differential input supports multiple types of reference clocks including LVPECL, HCSL, LVCMOS and CML. The differential output complies with the same reference clocks that the differential input support. The device also contains a jitter tolerance measurement circuitry for each output.

ZL30117GGG2’s working principle is based on two main components: PLL (phase-locked loop) and VCO (voltage-controlled oscillator). The PLL portion locks the output frequency to the input reference clock frequency, providing very low output jitter and high frequency stability. The VCO portion is used to generate an internally adjustable voltage. This voltage is then used to modify the frequencies produced by the PLL portion, allowing the device to produce a wide range of output frequencies.

The device is also programmable via the Serial Peripheral Interface (SPI) bus, which is used to configure the device’s settings. The SPI bus controls the various output frequency settings, spread spectrum settings and jitter tolerance settings. All register settings can be configured and modified over the SPI bus.

ZL30117GGG2 is an ideal choice for a range of applications that require low jitter clock generation and high frequency stability. It is widely used by system designers in mobile, networking, computing and communications markets. It has a wide range of outputs from 13-90 MHz and has a programmable spread spectrum mode, making it a suitable choice for applications where high performance and low jitter are required.

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