24LC512-I/SM

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1. Description

The Microchip Technology Inc. 24AA512/24LC512-I/SM/ 24FC512 (24XX512*) is a 64K x 8 (512 Kbit) Serial Electrically Erasable PROM, capable of operation across a broad voltage range (1.7V to 5.5V). It has been developed for advanced, low-power applications such as personal communications and data acquisition. This device also has a page write capability of up to 128 bytes of data. This device is capable of both random and sequential reads up to the 512K boundary. Functional address lines allow up to eight devices on the same bus, for up to 4 Mbit address space. This device is available in the standard 8-pin plastic DIP, SOIJ, SOIC, TSSOP, DFN, and 14-lead TSSOP packages. The 24AA512 is also available in the 8-lead Chip Scale package.

2. Features

    1. Single Supply with Operation down to 1.7V for 24AA512 and 24FC512 Devices, 2.5V for 24LC512 Devices

    2. Low-Power CMOS Technology:

        - Active current 400 uA, typical

        - Standby current 100 nA, typical

    3. 2-Wire Serial Interface, I2C™ Compatible

    4. Cascadable for up to Eight Devices

    5. Schmitt Trigger Inputs for Noise Suppression

    6. Output Slope Control to Eliminate Ground Bounce

    7. 100 kHz and 400 kHz Clock Compatibility

    8. Page Write Time 5 ms max.

    9. Self-Timed Erase/Write Cycle

  10. 128-Byte Page Write Buffer

  11. Hardware Write-Protect

  12. ESD Protection >4000V

  13. More than 1 Million Erase/Write Cycles

  14. Data Retention > 200 years

  15. Packages Include 8-lead PDIP, SOIJ, SOIC, TSSOP, DFN, Chip Scale and 14-lead TSSOP

  16. Pb-Free and RoHS Compliant

  17. Temperature Ranges:

        - Industrial (I): -40°C to +85°C

        - Automotive (E):-40°C to +125°C

3. Pin configuration

4. Pin function

5. FUNCTIONAL DESCRIPTION

The 24LC512-I/SM supports a bidirectional 2-wire bus and data transmission protocol. A device that sends data onto the bus is defined as a transmitter and a device receiving data as a receiver. The bus must be controlled by a host device which generates the Serial Clock (SCL), controls the bus access and generates the Start and Stop conditions, while the 24LC512-I/SM works as a client. Both host and client can operate as a transmitter or receiver, but the host device determines which mode is activated.

6. Package overview