24LC512T-I/SM

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1. Describe

Microchip Technology Inc. 24AA512/24LC512T-I/SM/24FC512 (24XX512*) is a 64K x 8 (512 Kbit) serial Electrically erasable PROM, operable Across a wide voltage range (1.7V to 5.5V). it has Specially developed for advanced low-power applications For example, personal communications and data collection. The device also has the ability to write upwards to the page To 128 bytes of data. The device can simultaneously Random and sequential reads up to 512K boundaries. The functional address line allows up to eight devices The same bus, up to 4 Mbit address space. this The device uses a standard 8-pin plastic DIP, SOIJ, SOIC, TSSOP, DFN and 14-pin TSSOP Bag. 24AA512 can also be used for 8 leads Chip scale packaging.

2. Feature

    1. Single power supply with operating voltage as low as 1.7V 24AA512 and 24FC512 devices, 2.5V for 24LC512 device

    2. Low-power CMOS technology:

        - Active current 400 uA, typical

        - Standby current 100 nA, typical

    3. 2-wire serial interface, compatible with I2C™

    4. Up to 8 devices can be cascaded

    5. Schmitt trigger input for noise suppression

    6. Output slope control to eliminate ground bounce

    7. 100 kHz and 400 kHz clock compatibility

    8. The maximum page write time is 5 ms.

    9. Self-timed erase/write cycle

  10. 128-byte page write buffer

  11. Hardware write protection

  12. ESD protection >4000V

  13. Over 1 million erase/write cycles

  14. Data retention> 200 years

  15. Package includes 8-pin PDIP, SOIJ, SOIC, TSSOP, DFN, chip-level and 14-pin TSSOP

  16. Lead-free and RoHS compliant

  17. temperature range:

        - Industry (I): -40°C to +85°C

        - Car (E): -40°C to +125°C

3. Pin configuration

4. Pin description

5. Function Description

24LC512T-I/SM supports bidirectional 2-wire bus and Data transfer protocol. The device that sends the data Defined as transmitters and devices on the bus Receive data as a receiver. Bus must Controlled by the main device, generated by the device Serial clock (SCL), which controls bus access and Generate start and stop conditions, and 24LC512T-I/SM works as a slave. Master-slave Can operate as a transmitter or receiver, but The master device decides which mode to activate

6. Package overview