87016AYLF

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Clock/Timing - Clock Generators, PLLs, Frequency Synthesizers often refer to the application field of the 87016AYLF, a voltage-controlled oscillator (VCO) IC from the company CrystalChips. With different types of applications and conditions, the 87016AYLF can be used to generate non-traditional, non-standard and non-common frequencies (e.g., as low as 6.5 MHz and/or as high as 245 MHz). Having a “steady” holdover time of less than 10 μsec, the chip also offers a wide range of applications, serving as a cost-effective alternative to putting together traditional phase locked loops (PLLs).

The 87016AYLF clock generator/frequency synthesizer is built on top of a “frequency multiplication/division” architecture with an AST-AZ-33 clock chip, a pair of RF switches, and a linear four-channel multiplexer. In a reference design, the four channels are populated with integer-division ratios of 2-4-8-16, thus allowing the clock chip to generate a wide range of frequencies. The AST-AZ-33 chip is a very low power CMOS device, with a frequency range from 0.1 Hz to 2.5 GHz.

The 87016AYLF VCO operates in a very simple manner: first, the reference-clock signal is divided by one of the four channel dividers, set according to the required output frequency. The divided clock is then applied to the AST-AZ-33 chip that gives a VCO output. The VCO output is routed through an RF switch, to be sent to the selected output port. The RF switch is used to select one of the four possible output channels.

One of the features of the 87016AYLF is the “on-chip” voltage regulated output, which is adjustable between 0.5mA (the minimum power required to operate the chip) up to 400mA. This feature allows the designer to avoid the additional components and financial investment that would otherwise be associated with traditional PLLs. The chip is also capable of tolerating the wide-ranging input supply voltages (from 2.7 to 6.2 volts).

The 87016AYLF is ideal for applications such as ultra-low-jitter clock generators, low-power low-noise clock synthesis, programmable frequency dividers, or frequency synthesizers for wireless applications. It can be used as a backbone for sensitive systems, where high precision timing is essential, such as network applications. By carefully tailoring the clock signal division ratios, the frequency synthesizer can be designed to create a wide range of frequencies, within a single chip, thus reducing the complexity and cost of implementation.

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