ADC128S022CIMTX/NOPB

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1. Describe

The ADC128S022CIMTX/NOPB device is a low power, octal CMOS 12-bit analog-to-digital converter specified for conversion throughput rates of 50 ksps to 200 ksps. The converter is based on a continuous approximate register architecture with internal track and hold circuitry. It can be configured to accept up to 8 input signals at inputs IN0 to IN7. The output serial data is straight binary and is compatible with multiple standards such as SPI, QSPI, MICROWIRE and many common DSP serial interfaces. The ADC128S022CIMTX/NOPB can operate analog and digital power independently. The analog power supply (VA) ranges from 2.7 V to 5.25 V and the digital power supply (VD) ranges from 2.7 V to VA. Normal power consumption using a 3V or 5V supply is 1.2 mW and 7.5 mW, respectively. The power-down feature reduces power consumption to 0.06µW using a 3V supply and 0.25µW using a 5V supply. ADC128S022 in 16-Pin TSSOP Package pack. Operation in extended industry ensures a temperature range of -40°C to +105°C.

2. Feature

    1. Eight input channels

    2. Variable power management

    3. Separate analog and digital power supplies

    4. SPI™/QSPI™/MICROWIRE/DSP compatible

    5. Available in 16-pin TSSOP package

    6. Conversion rate: 50ksps to 200ksps

    7. DNL (VA = VD = 5 V): +1 / -0.7 LSB (max)

    8. INL (VA = VD = 5 V): ±1 LSB (max)

    9. energy consumption

        – 3V supply: 1.2 mW (typ)

        – 5V supply: 7.5 mW (typ)

3. Application

    1. GPS

    2. Portable system

    3. medical instruments

    4. Mobile communications

    5. Instrumentation and Control Systems

4. Pin configuration

5. Pin Description

6. Serial interface

The working timing diagram and serial port timing diagram of ADC128S022CIMTX/NOPB are shown in the figure. Specifications section. CS, chip select, start conversion and frame serial data transfer. SCLK (serial clock) to control the conversion process and timing of serial data. DOUT is the serial data output pin, and the conversion result is sent as a serial data stream, MSB first. The data control register to be written to the ADC128S022 is located on the serial data input pin DIN. Each conversion writes new data to DIN. A serial frame begins on the falling edge of CS and ends on the rising edge of CS. Each frame must contain an integer multiple of 16 SCLK rising edges. When CS is high, the DOUT pin of the ADC is in a high-impedance state, valid when CS is low. Therefore, CS acts as an output enable. Likewise, when CS reaches height. During the first 3 cycles of SCLK, the ADC is in track mode, acquiring the input voltage. in the next 13 The SCLK cycle completes the conversion and outputs the data. Leading zeros are output on falling edges 1 to 4 of SCLK, and conversion results are output on falling edges 5 to 16, MSB first. If there are multiple conversions in a frame (continuous conversion mode), the ADC will re-enter tracking mode on falling The SCLK edge after the N*16th rising edge of SCLK, and the SCLK edge that re-enters hold/convert mode on the N*16+4th falling edge. "N" is an integer value. The ADC128S022 enters tracking mode under three different conditions. In the second case, CS goes low and SCLK goes low. In this case, the ADC automatically enters tracking mode, and the falling edge of CS is considered to be the first falling edge of SCLK. In the third case, CS and SCLK go low at the same time, and the ADC enters tracking mode.

7. Analog input

Diodes D1 and D2 provide ESD protection for the analog inputs. The analog input operates from 0 V to VA. Exceeding this range can cause the ESD diode to conduct and cause unstable operation. Resistor R1 is the on-resistance of the multiplexer and track/hold switch, typically 500 Ω. Capacitor C2 is the ADC128S022 sampling capacitor, typically 30 pF. The ADC128S022 will provide the best performance when driven by a low impedance source (less than 100 Ω). This is especially important when sampling dynamic signals with the ADC128S022. Bandpass or lowpass filters are also important when sampling dynamic signals to reduce harmonics and noise in the input. These filters are often referred to as anti-aliasing filters.

8. Digital input and output

The digital inputs (SCLK, CS, and DIN) of the ADC128S022 operate from –0.3 V to VA. They are less prone to latch-up and can be asserted before digital power (VD) without any risk. The digital output (DOUT) operating range is controlled by VD. The output high voltage is VD – 0.5V (min) and the output low voltage is 0.4V (max).

9. Device functional mode

The ADC128S022CIMTX/NOPB is fully powered up when CS is low and powered down when CS is high, with one exception. If operating in continuous conversion mode, the ADC128S022 automatically enters power-down mode on a mode transition between the 16th conversion falling edge of SCLK and the first falling edge of SCLK. In continuous conversion mode, the ADC128S022 can perform multiple conversions back-to-back. Each conversion requires 16 SCLK cycles, and the ADC128S022 will continue to perform conversions as long as CS remains low. Continuous mode provides maximum throughput. In burst mode, the user can trade off throughput and power consumption by performing fewer conversions per time. Unit of time. This means more time is spent in power-down mode and less time in normal mode. By using this technique, users can achieve very low sample rates while still using the SCLK frequency specification within the electrical. The power consumption vs. SCLK curve in the Typical Characteristics section shows the power consumption of a typical ADC128S022. To calculate power consumption (PC), simply multiply by Multiply the time spent in normal mode (tN) by the normal mode power consumption (PN) and add the time fractional power consumption in shutdown mode (tS) multiplied by the shutdown mode power consumption (PS).

10. Application Information

The ADC128S022CIMTX/NOPB is a successive approximation analog-to-digital converter designed around the charger redistribution digital-to-analog converter. Since the ADC128S022 integrates an 8-to-1 MUX on the front end, the device is typically used in applications that need to monitor multiple voltages. In addition to having 8 input channels, the ADC128S022 can operate at sample rates up to 200 kSPS. Therefore, the ADC128S022 typically operates in burst mode, where the voltage is sampled multiple times, and then the ADC128S022 can be powered down. This is a common technique for power-constrained applications. due to high bandwidth and sampling rate, the ADC128S022 is suitable for monitoring AC waveforms as well as DC inputs. the following Examples show common configurations for monitoring AC input.