| Allicdata Part #: | 296-25838-2-ND |
| Manufacturer Part#: |
ADS7950SBRGET |
| Price: | $ 164.18 |
| Product Category: | Integrated Circuits (ICs) |
| Manufacturer: | Texas Instruments |
| Short Description: | IC ADC 12BIT 1MSPS 4CH 24VQFN12 Bit Analog to Digi... |
| More Detail: | N/A |
| DataSheet: | ADS7950SBRGET Datasheet/PDF |
| Quantity: | 3000 |
| 1 +: | $ 164.18000 |
| Series: | microPOWER™ |
| Packaging: | Tape & Reel (TR) |
| Part Status: | Active |
| Number of Bits: | 12 |
| Sampling Rate (Per Second): | 1M |
| Number of Inputs: | 4 |
| Input Type: | Single Ended |
| Data Interface: | SPI |
| Configuration: | MUX-S/H-ADC |
| Ratio - S/H:ADC: | 1:1 |
| Number of A/D Converters: | 1 |
| Architecture: | SAR |
| Reference Type: | External |
| Voltage - Supply, Analog: | 2.7 V ~ 5.25 V |
| Voltage - Supply, Digital: | 1.7 V ~ 5.25 V |
| Features: | -- |
| Operating Temperature: | -40°C ~ 125°C |
| Package / Case: | 24-VFQFN Exposed Pad |
| Supplier Device Package: | 24-VQFN (4x4) |
| Base Part Number: | ADS7950 |
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1. Description
The ADS79xx is a 12-, 10-, 8-bit pin compatible multichannel analog-to-digital converter family. The device comparison table shows all twelve devices from this product family. The devices include a capacitor based SAR A/D converter with inherent sample and hold. The devices accept a wide analog supply range from 2.7 V to 5.25 V. Very low power consumption makes these devices suitable for battery-powered and isolated power-supply applications. A wide 1.7-V to 5.25-V I/O supply range facilitates a glueless interface with the most commonly used digital hosts. The serial interface is controlled by CS and SCLK for easy connection with microprocessors and DSP. The input signal is sampled with the falling edge of CS. It uses SCLK for conversion, serial data output, and reading serial data in. The devices allow auto sequencing of preselected channels or manual selection of a channel for the next conversion cycle. There are two software selectable input ranges (0 V to VREF and 0 V to 2 × VREF), individually configurable GPIOs (four in case of the TSSOP and one on the VQFN package devices), and two programmable alarm thresholds per channel. These features make the devices suitable for most data acquisition applications. The devices offer an attractive power-down feature. This is extremely useful for power saving when the device is operated at lower conversion speeds. The 16-, 12-channel devices from this family are available in a 38-pin TSSOP and 32 pin VQFN package and the 4/8-channel devices are available in a 30-pin TSSOP and 24 pin VQFN packages.
2. Features
1. 1-MHz Sample Rate Serial Devices
2. Product Family of 12-, 10-, 8-Bit Resolution
3. Zero Latency
4. 20-MHz Serial Interface
5. Analog Supply Range: 2.7 to 5.25 V
6. I/O Supply Range: 1.7 to 5.25 V
7. Two SW Selectable Unipolar, Input Ranges: 0 to VREF and 0 to 2 x VREF
8. Auto and Manual Modes for Channel Selection
9. 4-, 8-Channel Devices and 12-, 16-Channel Devices Share the Same Footprint
10. Two Programmable Alarm Levels per Channel
11. Four Individually Configurable GPIOs in TSSOP Package: One GPIO in VQFN Package
12. Typical Power Dissipation: 14.5 mW (+VA = 5 V, +VBD = 3 V) at 1 MSPS
13. Power-Down Current (1 μA)
14. Input Bandwidth (47 MHz at 3 dB)
15. 38-, 30-Pin TSSOP and 32-, 24-Pin VQFN Packages
3. Applications
1. PLC/IPC
2. Optical Line Card Monitoring
3. Medical Instrumentation
4. Digital Power Supplies
5. Multi-Channel, General-Purpose Signal Monitoring
6. High-Speed Data Acquisition Systems
7. High-Speed Closed-Loop Systems
4. Application Information
In general applications, when the internal multiplexer is updated, the previously converted channel charge is stored in the 15-pF internal input capacitance that disturbs the voltage at the newly selected channel. This disturbance is expected to settle to 1 LSB during sampling (acquisition) time to avoid degrading converter performance. The initial absolute disturbance error at the channel input must be less than 0.5 V to prevent source current saturation or slewing that causes significantly long settling times. Fortunately, significantly reducing disturbance error is easy to accomplish by simply placing a large enough capacitor at the input of each channel. Specifically, with a 150-pF capacitor, instantaneous charge distribution keeps disturbance error less than 0.46 V because the internal input capacitance can only hold up to 75 pC (or 5 V × 15 pF). The remaining error must be corrected by the voltage source at each input, with impedance low enough to settle within 1 LSB.
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ADS7950SBRGET Datasheet/PDF