AT17C65-10PC Allicdata Electronics
Allicdata Part #:

AT17C65-10PC-ND

Manufacturer Part#:

AT17C65-10PC

Price: $ 0.00
Product Category:

Integrated Circuits (ICs)

Manufacturer: Microchip Technology
Short Description: IC SERIAL CONFIG PROM 64K 8DIP
More Detail: N/A
DataSheet: AT17C65-10PC datasheetAT17C65-10PC Datasheet/PDF
Quantity: 1000
Stock 1000Can Ship Immediately
Specifications
Series: --
Packaging: Tube 
Part Status: Obsolete
Programmable Type: Serial EEPROM
Memory Size: 64kb
Voltage - Supply: 4.75 V ~ 5.25 V
Operating Temperature: 0°C ~ 70°C
Package / Case: 8-DIP (0.300", 7.62mm)
Supplier Device Package: 8-PDIP
Base Part Number: AT17C65
Description

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The AT17C65-10PC is a low-cost, high-performance serial Configuration PROM for use with multiple device families of Field Programmable Gate Arrays (FPGAs). It is designed for use in applications requiring serial input of configuration data, such as in high-density logic designs. The features of the AT17C65-10PC include a 16-byte configuration code, a 128-bit unique ID code, and a byte-wide page read/write capability. The AT17C65-10PC is a single-chip, low-cost and high-performance memory device that is ideal for FPGA configuration and/or addressing applications.

AT17C65-10PC Application Field and Working Principle

The primary application field of the AT17C65-10PC is FPGA configuration and/or addressing. Additionally, the AT17C65-10PC can be used for code protection and data storage in larger and lower cost logic designs. The AT17C65-10PC is designed to be used in low-volume applications for FPGA designs up to 188 logic elements. The AT17C65-10PC is available in two package styles: plastic DIP and plastic SOIC.

The working principle of the AT17C65-10PC is based on a single-chip, low-cost and high-performance memory device. The AT17C65-10PC includes a number of features, such as a 16-byte configuration code, a 128-bit unique ID code, and a byte-wide page read/write capability. Additionally, it features 1,888-word (3-bit) EEPROM cells that support a variety of programming options, including write-cycle protection. Furthermore, special power and operation supply conditions are available for external programming, making the AT17C65-10PC an ideal device for custom FPGA designs.

The AT17C65-10PC has a two-state or two-wire type serial configuration. Data is serially input and output via a single I/O pin. A single control line, BC, is used to select the desired state and to control the data I/O operations. The data is organized into 16-bit words, which contain 128 bits of code. The code is divided into four 16-bit words (A0-A3, B0-B3, C0-C3, and D0-D3). Each word is programmed with an 8-bit data byte and an 8-bit protection byte.

The AT17C65-10PC has additional features that enable it to be used for code protection and data storage. The AT17C65-10PC has a two-byte write protect register that can be used to permanently lock or write protect the entire configuration data. It also has an eight-byte user programmable identification code that can be used to uniquely identify the user’s device. In addition, the AT17C65-10PC has an address-independent programming mode that allows the memory to be programmed without knowing the exact address of the memory location.

The AT17C65-10PC can be programmed using a specialized programming unit. The programming unit is powered via a USB cable and is plugged into the computer. Once plugged in, it is ready to program the AT17C65-10PC. A standard programming language such as VHDL is used to write the configuration data. The data is then transferred to the programming unit and stored into the AT17C65-10PC. The programming process takes a few minutes to complete.

The AT17C65-10PC is a low-cost, high-performance memory device that is ideal for FPGA configuration and/or addressing applications. It features a single-chip design and a multi-function architecture that makes it suitable for code protection and data storage. Additionally, it offers a variety of programming options and an address-independent programming mode. Its small size and low cost make it an ideal choice for custom FPGA designs.

The specific data is subject to PDF, and the above content is for reference

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