AT17LV256-10NC Allicdata Electronics
Allicdata Part #:

AT17LV256-10NC-ND

Manufacturer Part#:

AT17LV256-10NC

Price: $ 0.00
Product Category:

Integrated Circuits (ICs)

Manufacturer: Microchip Technology
Short Description: IC EEPROM FPGA 256KB 8-SOIC
More Detail: N/A
DataSheet: AT17LV256-10NC datasheetAT17LV256-10NC Datasheet/PDF
Quantity: 1000
1 +: 0.00000
Stock 1000Can Ship Immediately
$ 0
Specifications
Series: --
Packaging: Tube 
Part Status: Obsolete
Programmable Type: Serial EEPROM
Memory Size: 256Kb
Voltage - Supply: 3 V ~ 3.6 V, 4.75 V ~ 5.25 V
Operating Temperature: 0°C ~ 70°C
Package / Case: 8-SOIC (0.154", 3.90mm Width)
Supplier Device Package: 8-SOIC
Base Part Number: AT17LV256
Description

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Memory Configuration Proms for FPGAs are an important part of designing and developing systems using FPGAs. Many FPGAs come with on-board configuration memory and some come with dedicated external memory, such as AT17LV256-10NC, for configuration purposes. AT17LV256-10NC is a 32-pin 3.3V CMOS low-voltage configuration device that can store 256-kbits of data. It comes with a JEDEC Compliant Serial Peripheral Interface (SPI) implementation. This article will discuss the application field and working principle of AT17LV256-10NC.

Application Field of AT17LV256-10NC

AT17LV256-10NC is used in many design scenarios, where an external non-volatile memory can be utilized to store the configuration data. This device is suitable for FPGA applications that demand frequent reconfiguration or applications that require storing large amounts of data. AT17LV256-10NC also finds its application for implementing secure stored keys and passwords for security purposes like authentication. It also finds its application in booting microprocessors or microcontrollers. AT17LV256-10NC can also be used for storing bitstreams that can be used for updating and reconfiguring the FPGA.

Working Principle of AT17LV256-10NC

AT17LV256-10NC consists of a JEDEC Compliant Serial Peripheral Interface (SPI) implementation that allows accessing, writing and reading of the non-volatile memory. When the FPGA is powered up, it initiates the configuration process by first omitting the reset pin of AT17LV256-10NC. After the reset is complete, the configuration process starts by enabling the /CS pin and writing the control data. Then the /CS pin is disabled and the data is transferred in a serial manner from the external data bus of the FPGA. The FPGA must provide the bus direction, data width, data format and timing. During the configuration process, the address information is transferred directly from the FPGA while data is transferred in 8-bit blocks.

When the data is transferred, the AT17LV256-10NC decodes the instructions, accepts the data, and stores it in non-volatile memory. When the configuration is done, the FPGA sends an ‘end of configuration’ signal and AT17LV256-10NC sends back a ‘configuration done’ signal. Finally, the FPGA starts executing its configuration stored in the AT17LV256-10NC.

Conclusion

There are many advantages of using the AT17LV256-10NC for FPGA configuration, such as, it offers security in the case of microcontroller or microprocessor booting, it offers frequent reconfiguration of FPGAs, it offers storing of large amounts of data and it also offers secure stored keys and passwords for authentication. All of these advantages make the AT17LV256-10NC a good memory solution for FPGA applications.

The specific data is subject to PDF, and the above content is for reference

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