ATXMEGA128A4U-AU

Description

The AVR XMEGA AU microcontrollers is a family of low-power, high-performance, and peripheral-rich CMOS 8/16-bit microcontrollers based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the Atmel AVR XMEGA AU devices achieve throughputs approaching one million instructions per second (MIPS) per megahertz, allowing the system designer to optimize power consumption versus processing speed.

The AVR CPU combines a rich instruction set with 32 general purpose working registers. All 32 registers are directly connected to the arithmetic logic unit (ALU), allowing two independent registers to be accessed in a single instruction,executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs many times faster than conventional single-accumulator or CISC based microcontrollers.

The Atmel AVR XMEGA AU devices provide the following features: in-system programmable flash with read-while-write capabilities; internal EEPROM and SRAM; four-channel DMA controller; eight-channel event system and programmable multilevel interrupt controller; up to 78 general purpose I/O lines; 16- or 32-bit real-time counter (RTC); up to eight flexible, 16-bit timer/counters with capture, compare and PWM modes; up to eight USARTs; up to four I2 C and SMBUS compatible two-wire serial interfaces (TWIs); one full-speed USB 2.0 interface; up to four serial peripheral interfaces (SPIs); CRC module; AES and DES cryptographic engine; up to two 16-channel, 12-bit ADCs with programmable gain; up to two 2-channel, 12-bit DACs; up to four analog comparators with window mode; programmable watchdog timer with separate internal oscillator; accurate internal oscillators with PLL and prescaler; and programmable brown-out detection.

The program and debug interface (PDI), a fast, two-pin interface for programming and debugging, is available. Selected devices also have an IEEE std. 1149.1 compliant JTAG interface, and this can also be used for on-chip debug and programming.

The Atmel AVR XMEGA devices have five software selectable power saving modes. The idle mode stops the CPU while allowing the SRAM, DMA controller, event system, interrupt controller, and all peripherals to continue functioning. The power-down mode saves the SRAM and register contents, but stops the oscillators, disabling all other functions until the next TWI, USB resume, or pin-change interrupt, or reset. In power-save mode, the asynchronous real-time counter continues to run, allowing the application to maintain a timer base while the rest of the device is sleeping. In standby mode, the external crystal oscillator keeps running while the rest of the device is sleeping. This allows very fast startup from the external crystal, combined with low power consumption. In extended standby mode, both the main oscillator and the asynchronous timer continue to run. To further reduce power consumption, the peripheral clock to each individual peripheral can optionally be stopped in active mode and idle sleep mode.

The devices are manufactured using Atmel high-density, nonvolatile memory technology. The program flash memory can be reprogrammed in-system through the PDI or JTAG interfaces. A boot loader running in the device can use any interface to download the application program to the flash memory. The boot loader software in the boot flash section will continue to run while the application flash section is updated, providing true read-while-write operation. By combining an 8/16-bit RISC CPU with In-system, self-programmable flash, the Atmel AVR XMEGA is a powerful microcontroller family that provides a highly flexible and cost effective solution for many embedded applications.

The Atmel AVR XMEGA AU devices are supported with a full suite of program and system development tools, including C compilers, macro assemblers, program debugger/simulators, programmers, and evaluation kits.

Features

   1. High-performance, low-power Atmel® AVR® XMEGA® 8/16-bit Microcontroller

   2. Nonvolatile program and data memories

         1. 16K - 128KB of in-system self-programmable flash

         2. 4K - 8KB boot section

         3. 1K - 2KB EEPROM

         4. 2K - 8KB internal SRAM

   3. Peripheral Features

         1. Four-channel DMA controller

         2. Eight-channel event system

         3. Five 16-bit timer/counters

             - Three timer/counters with 4 output compare or input capture channels

             - Two timer/counters with 2 output compare or input capture channels

             - High-resolution extensions on all timer/counters

             - Advanced waveform extension (AWeX) on one timer/counter

         4. One USB device interface

             - USB 2.0 full speed (12Mbps) and low speed (1.5Mbps) device compliant

             - 32 Endpoints with full configuration flexibility

        5. Five USARTs with IrDA support for one USART

        6. Two Two-wire interfaces with dual address match (I2 C and SMBus compatible)

        7. Two serial peripheral interfaces (SPIs)

        8. AES and DES crypto engine

        9. CRC-16 (CRC-CCITT) and CRC-32 (IEEE® 802.3) generator

      10. 16-bit real time counter (RTC) with separate oscillator

      11. One twelve-channel, 12-bit, 2msps Analog to Digital Converter

      12. One two-channel, 12-bit, 1msps Digital to Analog Converter

      13. Two Analog Comparators with window compare function, and current sources

      14. External interrupts on all general purpose I/O pins

      15. Programmable watchdog timer with separate on-chip ultra low power oscillator

      16. QTouch® library support

              - Capacitive touch buttons, sliders and wheels

   4. Special microcontroller features

        1. Power-on reset and programmable brown-out detection

        2. Internal and external clock options with PLL and prescaler

        3. Programmable multilevel interrupt controller

        4. Five sleep modes

        5. Programming and debug interfaces

              - PDI (program and debug interface)

   5. I/O and packages

        1. 34 Programmable I/O pins

        2. 44 - lead TQFP

        3. 44 - pad VQFN/QFN

        4. 49 - ball VFBGA

   6. Operating voltage

        1. 1.6 – 3.6V

   7. Operating frequency

        2. 0 – 12MHz from 1.6V

        z 0 – 32MHz from 2.7V

Pinout/Block Diagram