C8051F130

Analog Peripherals

1. 10 or 12-bit SAR ADC

     - ± 1 LSB INL • Programmable throughput up to 100 ksps

     - Up to 8 external inputs; programmable as singleended or differential • Programmable amplifier gain: 16, 8, 4, 2, 1, 0.5

     - Data-dependent windowed interrupt generator

     - Built-in temperature sensor

2. 8-bit SAR ADC (‘F12x Only)

     - Programmable throughput up to 500 ksps • 8 external inputs (single-ended or differential)

     - Programmable amplifier gain: 4, 2, 1, 0.5

3. Two 12-bit DACs (‘F12x Only)

    - Can synchronize outputs to timers for jitter-free waveform generation

    - Two Analog Comparators

    - Voltage Reference

    - VDD Monitor/Brown-Out Detector

4. On-Chip JTAG Debug & Boundary Scan

    - On-chip debug circuitry facilitates full-speed, nonintrusive in-circuit/in-system debugging

    - Provides breakpoints, single-stepping, watchpoints,stack monitor; inspect/modify memory and registers

    - Superior performance to emulation systems using

5. ICE-chips, target pods, and sockets

    - IEEE1149.1 compliant boundary scan

    - Complete development kit

6. 100-Pin TQFP or 64-Pin TQFP Packaging

    - Temperature Range: –40 to +85 °C

    - RoHS Available

7. High Speed 8051 µC Core

    - Pipelined instruction architecture; executes 70% of instruction set in 1 or 2 system clocks

    - 100 MIPS or 50 MIPS throughput with on-chip PLL

    - 2-cycle 16 x 16 MAC engine (C8051F120/1/2/3 and C8051F130/1/2/3 only)

8. Memory

    - 8448 bytes internal data RAM (8 k + 256)

    - 128 or 64 kB Banked Flash; in-system programmable in 1024-byte sectors

    - External 64 kB data memory interface (programmable multiplexed or non-multiplexed modes)

9. Digital Peripherals

    - 8 byte-wide port I/O (100TQFP); 5 V tolerant

    - 4 Byte-wide port I/O (64TQFP); 5 V tolerant

    - Hardware SMBus™ (I2C™ Compatible), SPI™, and

10. two UART serial ports available concurrently

    - Programmable 16-bit counter/timer array with 6 capture/compare modules

    - 5 general purpose 16-bit counter/timers

    - Dedicated watchdog timer; bi-directional reset pin

11. Clock Sources

    - Internal precision oscillator: 24.5 MHz

    - Flexible PLL technology

    - External Oscillator: Crystal, RC, C, or clock

12. Voltage Supples

    - Range: 2.7–3.6 V (50 MIPS) 3.0–3.6 V (100 MIPS)

    - Power saving sleep and shutdown modes

The C8051F120/1/2/3 and C8051F130/1/2/3 devices include a multiply and accumulate engine which can be used to speed up many mathematical operations. MAC0 contains a 16-by-16 bit multiplier and a 40-bit adder, which can perform integer or fractional multiply-accumulate and multiply operations on signed input values in two SYSCLK cycles. A rounding engine provides a rounded 16-bit fractional result after an additional (third) SYSCLK cycle. MAC0 also contains a 1-bit arithmetic shifter that will left or right-shift the contents of the 40-bit accumulator in a single SYSCLK cycle.