C8051F582-IQ

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1. Describe

C8051F582-IQ/F59x devices have on-chip voltage regulators, power-on reset and VDD monitors, watchdog timers and clock oscillators, and are truly independent system-on-chip solutions. Flash memory It can even be reprogrammed online, provides non-volatile data storage, and allows field upgrades 8051 firmware. User software can fully control all peripheral devices and can be turned off individually Turn off any or all peripheral devices to save power. The on-chip Silicon Labs 2-wire (C2) development interface allows non-intrusive (not using on-chip Resources), using the production MCU installed in the final application for full-speed, online debugging. this The debugging logic supports checking and modification of memory and registers, setting breakpoints, and single Step, run and stop commands. All analog and digital peripherals are fully functional during debugging Use C2. Two C2 interface pins can be shared with user functions, allowing system debugging without occupying package pins. These devices are in the automotive temperature range (-40 to +125°C). By setting the VIO pin to 5 V, the port I/O and RST pin can be connected to 5 V logic. C8051F580/1/4/5 devices are available in 48-pin QFP and QFN packages, C8051F588/9-F590/1 The device adopts a 40-pin QFN package, and the C8051F582/3/6/7 device adopts a 32-pin package QFP and QFN packages. All packaging options are lead-free and RoHS compliant.

2. Feature

    1. High-speed pipeline 8051 compatible microcontroller core (up to 50 MIPS)

    2. In the system, full-speed, non-intrusive debugging interface (on-chip)

    3. The controller area network (CAN 2.0B) controller has 32 message objects, and each object has its own identifier mask (C8051F580/2/4/6/8-F590)

    4. LIN 2.1 peripherals (fully backward compatible, master-slave mode) (C8051F580/2/4/6/8-F590)

    5. True 12-bit 200 ksps 32-channel single-ended ADC with analog multiplexer

    6. Accurately programmable 24 MHz internal oscillator with an error within ±0.5% over the entire temperature range. 

        - The minimum output of the on-chip voltage regulator when the VDD voltage is greater than or equal to the low level environment. 

        - For VDD voltage lower than this minimum output setting, the oscillator is within +1.0%.

    7. Up to 50 MHz on-chip clock multiplier

    8. 128 kB (C8051F580/1/2/3/8/9) or 96 kB (C8051F584/5/6/7-F590/1) on-chip flash memory

    9. 8448 bytes of on-chip RAM

  10. SMBus/I2C, two enhanced UARTs and enhanced SPI serial interface implemented in hardware

  11. 6 general-purpose 16-bit timers

  12. External data memory interface with 64 kB address space (C8051F580/1/4/5)

  13. Two programmable counter/timer array (PCA) modules, each with six capture/compare modules, and A kind of with watchdog timer function

  14. Three voltage comparators

  15. On-chip voltage regulator

  16. On-chip power-on reset, VDD monitor and temperature sensor

  17. 40, 33 or 25 port I/O (5 V push-pull)

3. Analog Peripherals

    1. 12-Bit ADC

        - Up to 200 ksps 

        - Up to 32 external single-ended inputs

        - VREF from on-chip VREF, external pin or VDD

        - Internal or external start of conversion source

        - Built-in temperature sensor

    2. Three Comparators

        - Programmable hysteresis and response time 

        - Configurable as interrupt or reset source

        - Low current

4. On-Chip Debug

    1. On-chip debug circuitry facilitates full speed, nonintrusive in-system debug (no emulator required)

    2. Provides breakpoints, single stepping, inspect/modify memory and registers

    3. Superior performance to emulation systems using ICE-chips, target pods, and sockets

    4. Low cost, complete development kit

5. Supply Voltage 1.8 to 5.25 V

    1. Typical operating current: 15 mA at 50 MHz;

    2. Typical stop mode current: 230 µA

6. High-Speed 8051 µC Core

    1. Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks

    2. Up to 50 MIPS throughput with 50 MHz clock

    3. Expanded interrupt handler

7. Automotive Qualified

    1. Temperature Range: –40 to +125 °C

8. Memory

    1. 8448 bytes internal data RAM (256 + 8192 XRAM)

    2. 128 or 96 kB Banked Flash; In-system programmable in 512-byte Sectors

    3. External 64 kB data memory interface programmable for multiplexed or non-multiplexed mode

9. Digital Peripherals

    1. 40, 33, or 25 Port I/O; All 5 V push-pull with high sink current

    2. CAN 2.0 Controller—no crystal required

    3. LIN 2.1 Controller (Master and Slave capable); no crystal required

    4. Two Hardware enhanced UARTs, SMBus™, and enhanced SPI™ serial ports

    5. Six general purpose 16-bit counter/timers

    6. Two 16-Bit programmable counter array (PCA) peripherals with six capture/compare modules each and enhanced PWM functionality

10. Clock Sources

    1. Internal 24 MHz with ±0.5% accuracy for CAN and master LIN operation.

    2. External oscillator: Crystal, RC, C, or clock (1 or 2 pin modes)

    3. Can switch between clock sources on-the-fly; useful in power saving modes

11. Packages

    1. 48-Pin QFP/QFN (C8051F580/1/4/5)

    2. 40-Pin QFN (C8051F588/9-F590/1)

    3. 32-Pin QFP/QFN (C8051F582/3/6/7)

12. Pin configuration

13. Pin description