CDC950DGG Allicdata Electronics
Allicdata Part #:

296-9435-5-ND

Manufacturer Part#:

CDC950DGG

Price: $ 0.00
Product Category:

Integrated Circuits (ICs)

Manufacturer: Texas Instruments
Short Description: IC DIFF CLOCK SYNTH/DRVR 48TSSOP
More Detail: N/A
DataSheet: CDC950DGG datasheetCDC950DGG Datasheet/PDF
Quantity: 1000
1 +: 0.00000
Stock 1000Can Ship Immediately
$ 0
Specifications
Differential - Input:Output: No/Yes
Base Part Number: CDC950
Supplier Device Package: 48-TSSOP
Package / Case: 48-TFSOP (0.240", 6.10mm Width)
Mounting Type: Surface Mount
Operating Temperature: 0°C ~ 85°C
Voltage - Supply: 3.135 V ~ 3.465 V
Divider/Multiplier: Yes/No
Frequency - Max: 133MHz
Series: --
Ratio - Input:Output: 1:20
Number of Circuits: 1
Output: CMOS, HSCL
Input: Clock, Crystal
PLL: Yes with Bypass
Type: Clock/Frequency Synthesizer
Part Status: Obsolete
Packaging: Tube 
Description

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Clock Generators, PLLs, Frequency Synthesizers are important components in many circuits, which drives the working of the system by accurate and synchronous timing signals. Specifically, CDC950DGG falls into this field, with its application and working principles.

CDC950DGG is a high-performance, low-power clock generator/synthesizer that can deliver up to 21 outputs and three reference clocks. It provides a wide range of output frequencies by programmable multiplier and divider circuit, combined with a high-quality Read Only Memory (ROM) separate from the programmable circuitry. This removes the need for external components and allows customized configuration of the chip.

The programming of the chip can be done through embedded OTP memory, to eliminate the need for additional components. Besides, the chip can also generate output clocks from two external clock-inputs, for applications where a highly precise PLL will be needed. The output of the chip is fast switching, with a linear frequency range from 1.05Hz to 700MHz.

CDC950DGG includes an internal phase-locked-loop (PLL), which is used to control the frequency, phase and pulse width of the output clocks. First, the chip sets the phase of each output clock using the phase control circuit. After that, the frequency of the output clocks is set by the linear frequency control circuit, which includes a voltage-controlled oscillator and a programmable frequency divider/multiplier.

Once the output frequency is set, the internal PLL circuit is used to lock the output frequency and generate a synchronized signal at the correct frequency and phase. The PLL also maintains a signal-to-noise ratio (SNR) of -90dB or better. The final signal is then sent to the outputs of the chip.

CDC950DGG can be used in a variety of applications bringing high-performance and a wide range of frequencies. It is especially suitable for applications such as data acquisition, clock distribution, telecom and instrumentation. Additionally, the chip can be used to generate high-accuracy clocks for automotive, avionics and industrial control.

In conclusion, Clock Generators, PLLs, and Frequency Synthesizer are important components, used in many circuits and specifically, the CDC9500DGG, a high-performance, low-power clock generator/synthesizer, can deliver up to 21 outputs at a wide range of frequencies. It includes an internal phase-locked-loop (PLL) providing synchronous signal at the required frequency and phase. This chip provides a high-performance and a wide range of frequencies, making it suitable for different applications.

The specific data is subject to PDF, and the above content is for reference

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