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Home> Products> Integrated Circuits (ICs) > Clock/Timing - Clock Buffers, Drivers > CDCLVD110VF
CDCLVD110VF Allicdata Electronics
Allicdata Part #:

296-13712-5-ND
Manufacturer Part#:

CDCLVD110VF
Price: $ 9.03
Product Category:

Integrated Circuits (ICs)
Manufacturer: Texas Instruments
Short Description: IC CLK BUFFER 2:10 1.1GHZ 32LQFP
More Detail: Clock Fanout Buffer (Distribution), Multiplexer IC...
DataSheet: CDCLVD110VF datasheetCDCLVD110VF Datasheet/PDF
Quantity: 1000
1 +: $ 9.03000
10 +: $ 8.75910
100 +: $ 8.57850
1000 +: $ 8.39790
10000 +: $ 8.12700
Stock 1000Can Ship Immediately
$ 9.03
Specifications
Series: --
Packaging: Tray 
Part Status: Not For New Designs
Type: Fanout Buffer (Distribution), Multiplexer
Number of Circuits: 1
Ratio - Input:Output: 2:10
Differential - Input:Output: Yes/Yes
Input: LVDS
Output: LVDS
Frequency - Max: 1.1GHz
Voltage - Supply: 2.375 V ~ 2.625 V
Operating Temperature: -40°C ~ 85°C
Mounting Type: Surface Mount
Package / Case: 32-LQFP
Supplier Device Package: 32-LQFP (7x7)
Base Part Number: CDCLVD110
Description

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Clock/Timing - Clock Buffers, Drivers

CDCLVD110VF is a Clock Buffer/Driver that provides improved performance over standard buffers. It allows for output switching speeds of up to 300 MHz, allowing it to drive most clock signals. The device is pin-compatible with most buffers and drivers, making it easy to drop into existing designs. It also supports input to output skew of less than 1ns.CDCLVD110VF is suitable for applications in the industrial, consumer, telecommunications and computing markets. It can be used in clock distribution for SoC designs, CPU and motherboards, and in applications that require high-speed clock rates, such as communication systems and networking equipment.The CDCLVD110VF includes power-good and glitch-free outputs, enabling superior jitter performance. The device can be used in a wide range of applications and has low power consumption.The working principle of the CDCLVD110VF is to act as a buffer between the input clock and the output clock. The device takes in the input clock and buffers it to the output clock, with a low level of jitter and a low input-to-output skew. By buffering the input clock, the device is able to increase the output current of the clock, allowing it to drive signals at higher speeds.The device includes Power On Reset (POR) capability, allowing it to remain powered-off during system low power states, and an integrated speed Grade selector, allowing the user to control the output clock frequency. The device also includes integrated phase selection, which helps reduce jitter.The CDCLVD110VF also includes an auto-detect feature, which allows the device to detect if the output frequency is too low and automatically decrease the input frequency to ensure the output is within the specified range.The CDCLVD110VF offers a wide range of features and benefits for applications needing improved clock performance. The device offers high performance and low power consumption, and is suitable for use in a wide range of applications.

The specific data is subject to PDF, and the above content is for reference

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